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Patent # Description
US-1,014,8982 Video compression using perceptual modeling
Disclosed are techniques for video stream compression. A motion predicted frame and a current frame of video data are converted from a source color space to a...
US-1,014,8269 Dynamic termination edge control
Devices and methods include receiving a command at a command interface to assert on-die termination (ODT) during an operation. An indication of a shift mode...
US-1,014,7875 Semiconductor devices and electronic systems having memory structures
A semiconductor device comprises includes memory cells, a first dielectric liner material overlying side surfaces of the memory cells, a high-k dielectric...
US-1,014,7764 Constructions comprising stacked memory arrays
Some embodiments include a construction having a first memory array deck and a second memory array deck over the first memory array deck. The second memory...
US-1,014,7763 Resistive memory cell structures and methods
Resistive memory cell structures and methods are described herein. One or more memory cell structures comprise a first resistive memory cell comprising a first...
US-1,014,7727 Conductive structures, wordlines and transistors
Some embodiments include a conductive structure which has a first conductive material having a work function of at least 4.5 eV, and a second conductive...
US-1,014,7712 Memory device with a multiplexed command/address bus
A memory device includes a first plurality of volatile memories, a non-volatile memory, and a controller coupled to the non-volatile memory and including a...
US-1,014,7705 Stacked semiconductor die assemblies with die substrate extensions
Stacked semiconductor die assemblies with die substrate extensions are disclosed herein. In one embodiment, a semiconductor die assembly can include a package...
US-1,014,7638 Methods of forming staircase structures
Methods of forming staircase structures. The method comprises forming a patterned hardmask over tiers. An exposed portion of an uppermost tier is removed to...
US-1,014,7607 Semiconductor pitch patterning
A semiconductor pitch patterning can include a method comprising directionally forming a mask material on a first set of spacers. The first set of spacers can...
US-1,014,7606 Methods of forming semiconductor device structures including linear structures substantially aligned with other...
A method of forming a semiconductor device structure comprises forming a preliminary structure comprising a substrate, a photoresist material over the...
US-1,014,7497 Memory devices comprising magnetic tracks individually comprising a plurality of magnetic domains having domain...
A method of forming a memory device having magnetic tracks individually comprising a plurality of magnetic domains having domain walls, includes forming an...
US-1,014,7494 Apparatus configured to program memory cells using an intermediate level for multiple data states
Apparatus including an array of memory cells and a controller configured to apply a particular programming pulse to a plurality of memory cells having a first...
US-1,014,7486 Memory systems and memory programming methods
Memory systems and memory programming methods are described. According to one arrangement, a memory system includes a memory array comprising a plurality of...
US-1,014,7480 Sort operation in memory
Examples of the present disclosure provide apparatuses and methods related to performing a sort operation in a memory. An example apparatus might include a a...
US-1,014,7475 Refresh in memory based on a set margin
The present disclosure includes apparatuses and methods related to refresh in memory. An apparatus can refresh an array of memory cells in response to a portion...
US-1,014,7474 Memory cells and semiconductor devices including ferroelectric materials
Methods of operating a ferroelectric memory cell. The method comprises applying one of a positive bias voltage and a negative bias voltage to a ferroelectric...
US-1,014,7472 Apparatuses and methods for targeted refreshing of memory
Apparatuses and methods for targeted row refreshes are disclosed herein. In an example apparatus, a predecoder receives a target row address and determines...
US-1,014,7468 Accessing data in memory
The present disclosure includes apparatuses and methods related to accessing data in memory. One example method comprises storing data associated with a first...
US-1,014,7467 Element value comparison in memory
The present disclosure includes apparatuses and methods related to performing a greater vector determination in memory. An example apparatus comprises a first...
US-1,014,7466 Voltage reference computations for memory decision feedback equalizers
A device includes a combinational circuit configured to create a one or more distortion correction factors used offset inter-symbol interference from a data...
US-1,014,7465 System and method of command based and current limit controlled memory device power up
Devices and systems for powering up a memory device, for example, are disclosed. One such memory device includes power up circuitry configured to receive an...
US-1,014,6719 Semiconductor layered device with data bus
Apparatuses and methods of data communication between semiconductor chips are described. An example apparatus includes: a first die including a first switch...
US-1,014,6617 Error control in memory storage systems
A method includes calculating a first syndrome of a codeword read from a memory location under a first set of conditions and calculating a second syndrome of...
US-1,014,6614 Encoding data in a modified-memory system
In one embodiment, a set of memory circuits is separated from a logic system by a bus. The logic system can contain many of the logic functions traditionally...
US-1,014,6561 Executing applications from a semiconductor nonvolatile memory
A processor-based device (e.g., a wireless device) may include a processor and a semiconductor nonvolatile memory to directly execute an application (e.g., an...
US-1,014,6555 Adaptive routing to avoid non-repairable memory and logic defects on automata processor
Systems and methods for utilizing a defect map to configure an automata processor in order to avoid defects when configuring the automata processor. A system...
US-1,014,6537 Vector population count determination in memory
Examples of the present disclosure provide apparatuses and methods for determining a vector population count in a memory. An example method comprises...
US-1,014,6477 Command queuing
The present disclosure includes apparatuses and methods for command queuing. A number of embodiments include receiving a queued command request at a memory...
US-1,014,6457 Systems and methods for reordering packet transmissions in a scalable memory system protocol
A memory device includes a plurality of memory components that stores data and a processor communicatively coupled to the plurality of memory components. The...
US-1,014,6292 Power management
The present disclosure includes methods and apparatuses for power management. One method includes transferring data between a memory and a controller via an...
US-1,014,6036 Semiconductor wafer inspection using care area group-specific threshold settings for detecting defects
In the methods and systems, optical images of inspection care areas on a semiconductor wafer are acquired and analyzed to detect defects. However, during this...
US-D835,276 Keeled glenoid
US-1,014,2137 Wireless devices and systems including examples of full duplex transmission
Examples described herein include systems and methods which include wireless devices and systems with examples of full duplex compensation with a...
US-1,014,2112 Solid state storage device with command and control access
Several embodiments of memory devices and systems with command and control access are described herein. In one embodiment, a memory device includes a controller...
US-1,014,1942 Apparatuses and methods for providing frequency divided clocks
Apparatuses and methods for providing frequency divided clocks are described. An example apparatus includes a first circuit configured to provide a first...
US-1,014,1932 Wiring with external terminal
Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a pad included in a pad formation area that...
US-1,014,1665 Magnetic coupling systems
This patent pertains to magnetic coupling systems. One implementation includes magnetic jumper cables, which include magnetic couplers and elongate, insulated,...
US-1,014,1508 Clamp elements for phase change memory arrays
Clamp elements, memories, apparatuses, and methods for forming the same are disclosed herein. An example memory may include an array of memory cells and a...
US-1,014,1330 Methods of forming semiconductor device structures, and related semiconductor device structures, semiconductor...
A method of forming a semiconductor device structure comprises forming a stack structure comprising stacked tiers. Each of the stacked tiers comprises a first...
US-1,014,1322 Metal floating gate composite 3D NAND memory devices and associated methods
A 3D NAND memory structure having improved process margin and enhanced performance is provided. Such a memory structure can include a control gate material and...
US-1,014,1314 Memories and methods to provide configuration information to controllers
A memory system includes a memory controller and a memory module coupled to the memory controller. One such memory module may include a memory package of a...
US-1,014,1262 Electrically conductive laminate structures
Some embodiments include electrical interconnects. The interconnects may contain laminate structures having a graphene region sandwiched between non-graphene...
US-1,014,1259 Semiconductor devices having electrically and optically conductive vias, and associated systems and methods
Semiconductor devices having one or more vias filled with a transparent and electrically conductive material are disclosed herein. In one embodiment, a...
US-1,014,1215 Compliant needle for direct transfer of semiconductor devices
An apparatus includes a needle and a needle actuator to move the needle to a position at which the needle presses an electrically-actuatable element into...
US-1,014,0964 Guitar tremolo bridge
A tremolo bridge for a guitar comprising a body, a neck attached to said body, a headstock attached to said neck, a plurality of tuners disposed on said...
US-1,014,0225 Impedance adjustment in a memory device
Methods include configuring termination devices of a driver circuit of a memory device, storing a first plurality of trim values representative of the...
US-1,014,0222 Interface components
In an example, an apparatus may have a controller to be coupled to a host, an interface component coupled to the controller, and a plurality of memory devices...
US-1,014,0104 Target architecture determination
Examples of the present disclosure provide apparatuses and methods for target architecture determination. An example method comprises receiving an indication of...
US-1,014,0057 Apparatuses and methods for multiple address registers for a solid state device
The present disclosure includes apparatuses, systems, and methods related to multiple address registers for a solid state device (SSD). An example apparatus...
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