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Devices containing metal chalcogenides
Some embodiments include a device having a conductive material, a metal chalcogenide-containing material, and a region between the metal chalcogenide-containing...
Integrated memory and methods of forming repeating structures
Some embodiments include integrated memory having an array of repeating plates across a plurality of nodes. The array includes rows and columns. The plates...
Magnetic memory cells and methods of formation
Memory cells including cell cores having free regions are disclosed. The free regions exhibit a strain that affects a magnetization orientation within the cell...
Apparatuses and operation methods associated with resistive memory cell
arrays with separate select lines
The present disclosure includes methods and apparatuses that include resistive memory. A number of embodiments include a first memory cell coupled to a data...
Solid state lights with thermal control elements
A solid state light ("SSL"), a solid state emitter ("SSE"), and methods of manufacturing SSLs and SSEs. In one embodiment, an SSL comprises a packaging...
Content addressable memory
Content addressable memory (CAM) devices provide for high density, low cost CAM devices. CAM devices include a non-volatile memory array having a plurality of...
Accessory mounting system
An accessory mounting system comprises a vertically aligned bracket configured to mate with a top corner block and a bottom corner block disposed below the top...
Low grammage recording medium
The present disclosure provides low grammage recording media, and associated methods and systems. In one example, a low grammage recording medium can comprise a...
Computerized apparatus with a high speed data bus
A computerized apparatus configured for high-speed data transactions between components thereof. In one embodiment, the computerized apparatus includes a...
Apparatuses and methods for duty cycle adjustment
Apparatuses and methods for duty cycle adjustment are disclosed herein. An example apparatus may include a node, a phase mixer, and a duty cycle adjuster...
Electrode materials and interface layers to minimize chalcogenide
A phase-change memory cell having a reduced electrode-chalcogenide interface resistance and a method for making the phase-change memory cell are disclosed: An...
Magnetic memory cells and methods of fabrication
A magnetic cell includes a magnetic tunnel junction that comprises magnetic and nonmagnetic materials exhibiting hexagonal crystal structures. The hexagonal...
Dual work function recessed access device and methods of forming
A recessed access device having a gate electrode formed of two or more gate materials having different work functions may reduce the gate-induced drain leakage...
Semiconductor device packages with improved thermal management and related
Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. The stack...
Defects annealing and impurities activation in semiconductors at
thermodynamically non-stable conditions
A symmetric multicycle rapid thermal annealing (SMRTA) method for annealing a semiconductor material without the material decomposing. The SMRTA method includes...
External gettering method and device
Disclosed embodiments include external gettering provided by electronic packaging. An external gettering element for a semiconductor substrate, which may be...
Keyboards with planar translation mechanism formed from laminated
Keyboards with planar translation effecting mechanisms formed by laminated key guides are disclosed. A key assembly for a keyboard includes a keycap having a...
Memory array plane select
Memory arrays and methods of forming the same are provided. An example memory array can include at least one plane having a plurality of memory cells arranged...
Determining soft data for combinations of memory cells
The present disclosure includes apparatuses and methods for determining soft data for combinations of memory cells. A number of embodiments include an array of...
The present disclosure includes methods and systems for channel skewing. One or more methods for channel skewing includes providing a number of groups of data...
Sense amplifier with mini-gap architecture and parallel interconnect
A memory array structure includes: a plurality of array sections and a plurality of mini-gaps, wherein each mini-gap is disposed between two array sections of...
Non raster row pixel processing
A system and method for processing digital images that efficiently buffers pixel data relating to digital images is disclosed. Pixel values are read from an...
Efficient operations of components in a wireless communications device
Various embodiments comprise apparatuses and methods including a communications subsystem having an interface module and a protocol module with the...
Memory device using extended interface commands
A memory device includes a serial interface buffer that receives a hardware-decodable command and an extended interface command. The memory device also includes...
Stacked memory devices, systems, and methods
Memory requests for information from a processor are received in an interface device, and the interface device is coupled to a stack including two or more...
Directional drilling target steering apparatus and method
An apparatus and method are used in conjunction with a system for performing horizontal directional drilling, the system including a drill string extending from...
Coating for improved granular fertilizer efficiency
A fertilizer granule having a coating on at least of portion of a surface of the granule. The coating is made of one or more complexing agents and a coating...
Self-synchronizing tap driver for rigid/synchronous tapping with
adjustable tension and/or compression
Disclosed is a tap driver for rigid tapping, which includes adjustable tension and compression of the tap driver. In the preferred embodiment, the tap drive is...
Exterior automobile panel
Exterior automobile panel
Scan area indication
Various embodiments and methods relating to a scan area indicator are disclosed.
Method and system for securing a mobile electronic device
A mobile electronic device holder includes a backing configured to support a rear surface of a mobile electronic device, according to one embodiment. The mobile...
Structures for resistance random access memory and methods of forming the
Memory cells and methods of forming the same and devices including the same. The memory cells have first and second electrodes. An amorphous semiconductor...
Magnetic tunnel junctions
Some embodiments include a magnetic tunnel junction comprising magnetic reference material having an iridium-containing region between a multi-layer stack and a...
Semiconductor device comprising a transistor gate having multiple
vertically oriented sidewalls
A method used in fabrication of a recessed access device transistor gate has increased tolerance for mask misalignment. One embodiment of the invention...
Interfacial materials for use in semiconductor structures and related
A method of forming a semiconductor structure. The method comprises forming a high-k dielectric material, forming a continuous interfacial material over the...
Conductive structures, systems and devices including conductive structures
and related methods
Conductive structures include a plurality of conductive steps and a contact extending at least partially therethrough in communication with at least one of the...
Apparatuses and methods to control body potential in memory operations
Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatus and a data line...
Seasoning phase change memories
A seasoned phase change memory has been subjected to a longer pulse to adjust resistance levels prior to use of the phase change memory.
Methods and apparatuses for determining threshold voltage shift
Apparatuses and methods for determining threshold voltage shift are described. A number of methods for determining threshold voltage shift in memory cells...
Staggered DLL clocking on N-Detect QED to minimize clock command and delay
Apparatuses and methods are described for meeting timing and latency requirements using staggered clocking within the command path. In one example, an apparatus...
Enable/disable of memory chunks during memory access
Apparatuses and methods involving accessing memory cells are described. In one such method, chunks of memory cells in a memory array are enabled to be accessed...
Conditional operation in an internal processor of a memory device
An internal processor of a memory device configured to selectively execute instructions in parallel. One such internal processor includes a plurality of...
Methods and systems for routing in a state machine
A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a...
System and method for thermal chemical conversion of waste
A waste-to-energy conversion apparatus comprising a primary combustion chamber capable of holding a load of waste, and the primary combustion chamber further...
An illuminated ball may be used to play games in the water. An illuminated ball may include a hollow, spherical shell. A translucent light housing may be...
Edible bean line <11258> (vibrant)
An edible bean seed designated as <11258> or Vibrant, a sample of the edible bean deposited under accession no. PI 673082 is disclosed. Methods of using...
Exterior automobile panel
Exterior automobile panel