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Patent # Description
US-1,010,4055 System and process of protecting client side information in electronic transactions
A system, method and computer program product protects client information used for online transactions by storing transaction details on the client side of a...
US-1,010,3326 Conductive hard mask for memory device formation
Methods, systems, and devices for memory arrays that use a conductive hard mask during formation and, in some cases, operation are described. A hard mask may be...
US-1,010,3290 Ultrathin solid state dies and methods of manufacturing the same
Various embodiments of SST dies and solid state lighting ("SSL") devices with SST dies, assemblies, and methods of manufacturing are described herein. In one...
US-1,010,3196 Methods of forming magnetic memory cells, and methods of forming arrays of magnetic memory cells
Methods of forming a magnetic memory cell are disclosed. The method comprises forming a magnetic cell core material over a substrate, wherein forming the...
US-1,010,3160 Semiconductor structures including dielectric materials having differing removal rates
Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control...
US-1,010,3134 Methods of manufacturing multi-die semiconductor device packages and related assemblies
Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first...
US-1,010,3053 Methods of forming integrated circuitry
Some embodiments include methods in which a structure has a first semiconductor material over a dielectric region, a second semiconductor material under the...
US-1,010,3038 Thrumold post package with reverse build up hybrid additive structure
Semiconductor devices having a semiconductor die electrically coupled to a redistribution structure and a molded material over the redistribution structure are...
US-1,010,2914 Random telegraph signal noise reduction scheme for semiconductor memories
Embodiments are provided that include a method including providing a first voltage to a selected memory cell and providing a second voltage to the selected...
US-1,010,2905 Memory cells having a plurality of resistance variable materials
Resistance variable memory cells having a plurality of resistance variable materials and methods of operating and forming the same are described herein. As an...
US-1,010,2473 Soil moisture sensing determines soil type
Digitized images of the propagated waveforms returned by Time-Domain (TD) sensors reveal the effects of bound water in soil samples, causing errors in the...
US-1,010,2242 Bulk initial download of mobile databases
A system, method, and computer program product are provided for handling bulk initial downloads of databases to mobile devices. Rather than straining the...
US-1,010,1119 Holster dock
Representative implementations of devices and techniques provide a mounting dock to receive and to support an implement (such as a handgun, for example) or an...
US-1,009,9831 Storage system
What is disclosed is a storage and transport system for storage and transport objects such as jewelry or any other objects to be stored or carried. In a...
US-1,009,9620 Safety step on a hitch receiver for a truck
A step accessory for a receiver hitch for climbing into a truck bed. A step plate connected to the bottom of the receiver tube does not enter into or block the...
US-1,009,9178 Draw solutions and methods of treating an aqueous liquid
A method of treating an aqueous liquid. The method comprises providing an aqueous feed liquid comprising water and at least one solute to a first side of a...
US-1,009,8601 X-ray breast tomosynthesis enhancing spatial resolution including in the thickness direction of a flattened breast
Systems and methods for breast x-ray tomosynthesis that enhance spatial resolution in the direction in which the breast is flattened for examination. In...
US-1,009,8405 Head and face protection systems
Multi-axis quick-release gimbal hinges that releasably attach a face protector to a helmet. The hinges allow the face protection to be easily and quickly...
US-1,009,7181 Apparatus and method for standby current control of signal path
Apparatuses and methods for standby current control of a signal path in a semiconductor device are described. An example apparatus includes: first and second...
US-1,009,7169 Method and apparatus for reducing impact of transistor random mismatch in circuits
An analog circuit including a pair of input nodes and a pair of output nodes is coupled to a mismatch reduction circuit including an input node, an output node,...
US-1,009,6772 Methods for fabricating a memory device with an enlarged space between neighboring bottom electrodes
Embodiments of the present invention describe a method for fabricating a memory device comprising an enlarged space between neighboring bottom electrodes...
US-1,009,6748 Wavelength converters, including polarization-enhanced carrier capture converters, for solid state lighting...
Wavelength converters, including polarization-enhanced carrier capture converters, for solid state lighting devices, and associated systems and methods are...
US-1,009,6696 Field effect transistors having a fin
An embodiment of a transistor has a semiconductor fin, a dielectric over the semiconductor fin, a control gate over the dielectric, and source/drains in the...
US-1,009,6655 Three dimensional memory array
The present disclosure includes three dimensional memory arrays, and methods of processing the same. A number of embodiments include a plurality of conductive...
US-1,009,6617 Three-dimensional structured memory devices
A 3D structured nonvolatile semiconductor memory devices and methods for manufacturing are disclosed. One such device includes an n+ region at a source/drain...
US-1,009,6612 Three dimensional memory device having isolated periphery contacts through an active layer exhume process
A three dimensional memory device is described having an array region and a periphery region. The array region has a three dimensional stack of storage cells....
US-1,009,6579 Thermal pads between stacked semiconductor dies and associated systems and methods
Systems and methods are described for improved heat dissipation of the stacked semiconductor dies by including metallic thermal pads between the dies in the...
US-1,009,6576 Semiconductor device assemblies with annular interposers
A semiconductor device package is provided. The package can include a stack of semiconductor dies over a substrate, the substrate including a plurality of...
US-1,009,6551 Electronic component of integrated circuitry and a method of forming a conductive via to a region of...
An electronic component of integrated circuitry comprises a substrate comprising at least two terminals. Material of one of the terminals has an upper surface....
US-1,009,6483 Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device...
A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be...
US-1,009,6380 Erase page check
Disclosed in some examples are methods, systems, memory devices, and machine readable mediums for performing an erase page check. For example, in response to an...
US-1,009,6370 Voltage degradation aware NAND array management
Devices and techniques for voltage degradation aware NAND array management are disclosed herein. Voltage to a NAND device is monitored to detect a voltage...
US-1,009,6365 Erasable block segmentation for memory
Various embodiments comprise apparatuses such as those having a block of memory divided into sub-blocks that share a common data line. Each of the sub-blocks of...
US-1,009,5574 Apparatuses and methods for comparing a current representative of a number of failing memory cells
Apparatuses and methods for comparing a sense current representative of a number of failing memory cells of a group of memory cells and a reference current...
US-1,009,4988 Method of forming photonics structures
The disclosed embodiments relate to an integrated circuit structure and methods of forming them in which photonic devices are formed on the back end of...
US-1,009,3489 Veneer transporting apparatus
An infeed rollcase for transporting an infeed object. The rollcase uses a split drive system to move infeed objects at varying speeds in different infeed decks...
US-1,009,2931 Food article defect removal apparatus
A food article defect removal apparatus includes a manifold that defines one or more chambers for holding pressurized fluid. First channels extend from a first...
US-D830,225 Christmas tree ornament
US-1,009,0464 Buried low-resistance metal word lines for cross-point variable-resistance material memories
Variable-resistance material memories include a buried salicide word line disposed below a diode. Variable-resistance material memories include a metal spacer...
US-1,009,0457 Semiconductor devices with magnetic regions and stressor structures, and methods of operation
A magnetic cell core includes at least one stressor structure proximate to a magnetic region (e.g., a free region or a fixed region). The magnetic region may be...
US-1,009,0376 Methods of forming semiconductor device structures, and methods of forming capacitor structures
A method of forming a semiconductor device structure comprises forming a mold template comprising trenches within a mold material. Structures are formed within...
US-1,009,0346 Color filter array, imagers and systems having same, and methods of fabrication and use thereof
A pixel cell with a photosensitive region formed in association with a substrate, a color filter formed over the photosensitive region, the color filter...
US-1,009,0342 Stacked image sensor capacitors and related methods
Implementations of image sensors may include a first die including an image sensor array and a first plurality of interconnects where the image sensor array...
US-1,009,0324 Three dimensional memory and methods of forming the same
Some embodiments include a memory device and methods of forming the memory device. One such memory device includes a first group of memory cells, each of the...
US-1,009,0318 Vertical string of memory cells individually comprising a programmable charge storage transistor comprising a...
A method of forming a vertical string of memory cells comprises forming a lower stack comprising first alternating tiers comprising vertically-alternating...
US-1,009,0317 Methods and apparatuses having memory cells including a monolithic semiconductor channel
Methods for forming a string of memory cells, apparatuses having a string of memory cells, and systems are disclosed. One such method for forming a string of...
US-1,009,0313 NAND memory array with mismatched cell and bitline pitch
Embodiments of the present disclosure describe methods, apparatus, and system configurations for NAND memory arrays with mismatched cell and bitline pitch....
US-1,009,0310 Memory devices having select gates with P type bodies, memory strings having separate source lines and methods
Memory devices and methods of operating memory devices are shown. Configurations described include a memory cell string having an elongated n type body region...
US-1,009,0283 Methods and systems for improving power delivery and signaling in stacked semiconductor devices
Semiconductor die assemblies including stacked semiconductor dies having parallel plate capacitors formed between adjacent pairs of semiconductor dies in the...
US-1,009,0282 Semiconductor device assemblies with lids including circuit elements
A semiconductor device package is provided. The semiconductor device package includes a stack of semiconductor dies over a substrate, the substrate including a...
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