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Patent # Description
US-8,081,020 Delay-lock loop and method adapting itself to operate over a wide frequency range
A delay-lock loop receives an input clock signal from the output of a programmable divider that receives a reference clock signal. The delay-lock loop includes...
US-8,081,010 Self restoring logic
Self Restoring Logic (SRL) provides for SEU tolerance in high speed circuits. An SRL cell is designed to be stable in one of two internal states. Upon an SEU...
US-8,081,006 Non-linear sensor temperature compensation using summed temperature compensation signals
A sensor temperature compensation circuit that includes a sensor and non-linear temperature compensation circuit that compensates for non-linear temperature...
US-8,080,837 Memory devices, transistors, and memory cells
A memory device includes an array of memory cells and peripheral devices. At least some of the individual memory cells include carbonated portions that contain...
US-8,080,817 Memory cells
In some embodiments, a memory cell includes a transistor gate spaced from a channel region by gate dielectric; a source region on one side of the channel...
US-8,080,816 Silver-selenide/chalcogenide glass stack for resistance variable memory
The invention is related to methods and apparatus for providing a resistance variable memory element with improved data retention and switching characteristics....
US-8,080,615 Crosslinkable graft polymer non-preferentially wetted by polystyrene and polyethylene oxide
Methods for fabricating a random graft PS-r-PEO copolymer and its use as a neutral wetting layer in the fabrication of sublithographic, nanoscale arrays of...
US-8,080,460 Methods of forming diodes
Some embodiments include methods of forming diodes. A stack may be formed over a first conductive material. The stack may include, in ascending order, a...
US-8,080,163 Water treatment method
Exemplary systems and methods for treating contaminated water are described. In one instance a method supplies metal salt reagents to a moving media filter in...
US-8,079,757 Apparatus, method, and system for measuring water activity and weight
An apparatus configured to determine water activity and weight of a sample. The apparatus may comprise a chamber configured to at least partially enclose a...
US-8,078,973 Visual indication of a device connection speed
A method of providing visual indication of a device connection speed proceeds by determining a connection speed of the device and selecting a visual indicator...
US-8,078,848 Memory controller having front end and back end channels for modifying commands
The present disclosure includes methods, devices, modules, and systems for modifying commands. One device embodiment includes a memory controller including a...
US-8,078,797 Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash...
A memory storage system of an embodiment includes a nonvolatile memory unit and memory control circuitry coupled to the memory unit. Storage locations of the...
US-8,078,796 Method for writing to and erasing a non-volatile memory
A method for writing to and erasing a non-volatile memory is described. The method includes determining the size of a command window for use in n write...
US-8,078,499 Server-based processing for on-line viewing, purchasing and related analytics
An aspect of the disclosure is directed to an e-commerce data processing approach involving on-line viewing of a first article through a linking node for...
US-8,078,162 Airborne wireless communication systems, airborne communication methods, and communication methods
An airborne wireless communication system includes circuitry configured to access information describing a configuration of a terrestrial wireless communication...
US-8,078,018 Communication methods, methods of forming an interconnect, signal interconnects, integrated circuit structures,...
Some embodiments include communication methods, methods of forming an interconnect, signal interconnects, integrated circuit structures, circuits, and data...
US-8,078,001 Methods, apparatuses and systems for piecewise generation of pixel correction values for image processing
Methods, apparatuses and systems providing pixel correction values for a captured image, where the correction values are determined based on a ...
US-8,077,538 Address decoder and/or access line driver and method for memory devices
Address decoders and access line drivers are provided. One such row decoder and access line driver receives power supply voltages in a manner that prevents CHC...
US-8,077,532 Small unit internal verify read in a memory device
Methods for small unit internal verify read operation and a memory device are disclosed. In one such method, expected data is programmed into a grouping of...
US-8,077,519 Programming a memory device to increase data reliability
Methods for programming a memory array, memory devices, and memory systems are disclosed. In one such method, the target reliability of the data to be...
US-8,077,515 Methods, devices, and systems for dealing with threshold voltage change in memory devices
The present disclosure includes methods, devices, and systems for dealing with threshold voltage change in memory devices. A number of embodiments include an...
US-8,077,498 Reading a phase change memory
A phase change memory cell may be read by driving a current through the cell higher than its threshold current. A voltage derived from the selected column may...
US-8,077,238 Wide dynamic range sensor having a pinned diode with multiple pinned voltages
A pixel cell has controlled photosensor anti-blooming leakage by having dual pinned voltage regions, one of which is used to set the anti-blooming...
US-8,077,237 Method and apparatus for controlling dual conversion gain signal in imaging devices
A image-sensing device includes an array of light-sensing pixels arranged in rows, a readout circuit, and a control logic coupled to the rows of pixels. Each of...
US-8,077,236 Method and apparatus providing reduced metal routing in imagers
An imaging device and method for operating the device. The imaging device comprises a pixel array having a plurality of pixels arranged in rows and columns. At...
US-8,077,230 Methods and apparatus for reducing color material related defects in imagers
A film is used on the surface of a color filter array to keep tiny particles that remain on the surface so that they do not interfere during subsequent...
US-8,077,227 Method and apparatus providing analog row noise correction and hot pixel filtering
An imaging device and method for operating the device. The imaging device comprises a pixel array that comprises a plurality of imaging pixels and dark...
US-8,076,951 Spray cooling thermal management system and method for semiconductor probing, diagnostics, and failure analysis
A micro-spray cooling system beneficial for use in testers of electrically stimulated integrated circuit chips is disclosed. The system includes micro-spray...
US-8,076,783 Memory devices having contact features
Annular, linear, and point contact structures are described which exhibit a greatly reduced susceptibility to process deviations caused by lithographic and...
US-8,076,760 Semiconductor fuse arrangements
The invention includes semiconductor fuse arrangements containing an electrically conductive plate over and in electrical contact with a plurality of...
US-8,076,727 Magnesium-doped zinc oxide structures and methods
Methods of forming transparent conducting oxides and devices formed by these methods are shown. Monolayers that contain zinc and monolayers that contain...
US-8,076,721 Fin structures and methods of fabricating fin structures
There is provided fin structures and methods for fabricating fin structures. More specifically, fin structures are formed in a substrate. The fin structures may...
US-8,076,717 Vertically-oriented semiconductor selection device for cross-point array memory
A vertical semiconductor material mesa upstanding from a semiconductor base that forms a conductive channel between first and second doped regions. The first...
US-8,076,714 Memory device with high dielectric constant gate dielectrics and metal floating gates
A memory cell transistor includes a high dielectric constant tunnel insulator, a metal floating gate, and a high dielectric constant inter-gate insulator...
US-8,076,673 Recessed gate dielectric antifuse
A recessed dielectric antifuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A recess is formed between the...
US-8,076,663 Phase change memory structures
Methods, devices, and systems associated with phase change memory structures are described herein. One or more embodiments of the present disclosure can reduce...
US-8,076,249 Structures containing titanium silicon oxide
A dielectric containing a titanium silicon oxide film disposed in an integrated circuit and a method of fabricating such a dielectric provide a dielectric for...
US-8,076,248 Methods for forming semiconductor constructions, and methods for selectively etching silicon nitride relative...
The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for...
US-8,076,244 Methods for causing fluid to flow through or into via holes, vents and other openings or recesses that...
A method for removing material from surfaces of at least a portion of at least one recess or at least one aperture extending into a surface of a substrate...
US-8,076,229 Methods of forming data cells and connections to data cells
Disclosed are methods and devices, among which is a method that includes forming a lower conductive material on a substrate, forming a stop material on the...
US-8,076,211 Fabricating bipolar junction select transistors for semiconductor memories
A bipolar junction transistor may act as a select device for a semiconductor memory. The bipolar junction transistor may be formed of a stack of base and...
US-8,076,208 Method for forming transistor with high breakdown voltage using pitch multiplication technique
Transistors are formed using pitch multiplication. Each transistor includes a source region and a drain region connected by strips of active area material...
US-8,076,200 Charge trapping dielectric structures with variable band-gaps
A nonvolatile read-only memory having a thin nitrided tunnel insulator surface with a charge blocking insulator over the nitrided surface is presented. The...
US-8,076,195 Resistive memory architectures with multiple memory cells per access device
A resistive memory structure, for example, phase change memory structure, includes one access device and two or more resistive memory cells. Each memory cell is...
US-8,076,164 On-die bond wires system and method for enhancing routability of a redistribution layer
An integrated circuit includes a first die and a second die positioned in a package. The first die has a redistribution layer formed on the die and including a...
US-8,075,799 Carbon nanoparticle-containing hydrophilic nanofluid with enhanced thermal conductivity
The present invention relates to a nanofluid that contains carbon nanoparticles, metal oxide nanoparticles and a surfactant in a thermal transfer fluid. The...
US-8,075,632 Transtibial socket for external prosthesis
A prosthetic hard socket has a modified curvature and/or shape, which eliminates or de-emphasizes the patellar bar to eliminate or reduce pressure on the...
US-8,074,632 Variable pneumatic sear for paintball gun
An improved paintball gun uses a low-pressure pneumatic sear to hold the firing valve closed against the high pressure gas occupying the other side of the...
US-8,074,353 Methods of providing semiconductor components within sockets
The invention includes methods of utilizing removable mechanical precising mechanisms and/or optical-based precising mechanisms to align chips within sockets....
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