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Patent # Description
US-8,019,932 Block management for mass storage
An embodiment of the present invention includes a nonvolatile memory system comprising nonvolatile memory for storing sector information, the nonvolatile memory...
US-8,019,913 Dynamically setting burst length of double data rate memory device by applying signal to at least one external...
One or more external control pins and/or addressing pins on a memory device are used to set one or both of a burst length and burst type of the memory device.
US-8,019,863 Synchronizing events between mobile devices and servers
A system, method, and computer program product for synchronizing events between a mobile device and a server are described herein. In an embodiment, the method...
US-8,019,693 Systems and methods for utilizing printing device data in a customer service center
Systems and methods are described for collecting data in component memory of a printing device replaceable component and utilizing the data in a customer...
US-8,018,791 Circuit, system and method for controlling read latency
A read latency control circuit is described having a clock synchronization circuit and a read latency control circuit. The clock synchronization circuit...
US-8,018,786 Method for reading semiconductor memories and semiconductor memory
A phase change memory cells including a memory element or a threshold device is read using a read current which does not threshold either the memory element or...
US-8,018,778 Memory read methods, apparatus, and systems
Some embodiments include first memory cells and a first line used to access the first memory cells, second memory cells and at least one second line used to...
US-8,018,770 Program and sense operations in a non-volatile memory device
Methods for programming and sensing in a memory device, a data cache, and a memory device are disclosed. In one such method, all of the bit lines of a memory...
US-8,018,752 Configurable bandwidth memory devices and methods
Memory devices and methods are described, such as those that include a stack of memory dies and an attached logic die. Method and devices described provide for...
US-8,018,358 Balanced data bus inversion
A method and apparatus for balancing an output load using data bus inversion is disclosed. In brief, one such technique comprises measuring the "balance" of...
US-8,018,261 Clock generator and methods using closed loop duty cycle correction
Closed-loop duty-cycle correctors (DCCs), clock generators, memory devices, systems, and methods for generating an output clock signal having a particular duty...
US-8,018,258 Periodic signal synchronization apparatus, systems, and methods
Apparatus, systems, and methods are disclosed that operate to generate a periodic output signal from a periodic input signal, obtain a plurality of samples of a...
US-8,018,069 Through-hole contacts in a semiconductor device
Devices with conductive through-waver vias. In one embodiment, the device is formed by a method comprising providing a layer of semiconducting material, forming...
US-8,018,015 Buried conductor for imagers
A pixel cell having a photo-conversion device at a surface of a substrate and at least one contact area from which charge or a signal is output or received. A...
US-8,017,988 High density stepped, non-planar flash memory
A first plurality of memory cells is in a first plane in a first column of the array. A second plurality of memory cells is in a second plane in the same...
US-8,017,985 Concentric or nested container capacitor structure for integrated circuits
Disclosed are embodiments for a container capacitor structure in which at least two container capacitors, e.g., an inner and outer container capacitor, are made...
US-8,017,982 Imagers with contact plugs extending through the substrates thereof and imager fabrication methods
Methods for fabricating photoimagers, such as complementary metal-oxide-semiconductor (CMOS) imagers, include fabricating image sensing elements, transistors,...
US-8,017,926 Radiation collimator and systems incorporating same
A collimator including a housing having disposed therein a shield element surrounding a converter core in which a photon beam is generated from electrons...
US-8,017,481 Methods of forming nanoscale floating gate
A memory cell is provided including a tunnel dielectric layer overlying a semiconductor substrate. The memory cell also includes a floating gate having a first...
US-8,017,475 Process to improve high-performance capacitors in integrated MOS technologies
A method of fabricating a high-performance capacitor that may be incorporated into a standard CMOS fabrication process suitable for submicron devices is...
US-8,017,470 Method of forming a structure over a semiconductor substrate
The invention includes a method of forming a structure over a semiconductor substrate. A silicon dioxide containing layer is formed across at least some of the...
US-8,017,453 Method and apparatus for forming an integrated circuit electrode having a reduced contact area
A method and an apparatus for manufacturing a memory cell having a nonvolatile resistive memory element with a limited size active area. The method comprises a...
US-8,017,184 .beta.-diketiminate ligand sources and metal-containing compounds thereof, and systems and methods including same
The present invention provides metal-containing compounds that include at least one .beta.-diketiminate ligand, and methods of making and using the same. In...
US-8,017,173 Dehydrated mash potato product and process
Dehydrated potato pellets are made by preparing an aqueous mixture of dried potato pieces, an emulsifier, and oil, and, optionally, a freshly cooked potato,...
US-8,016,334 Bale lifting device for the handling of bales of fibrous material
A bale lifting device for the lifting, moving, and handling of cargo and/or bales of fibrous material such as hay. The bale lifting device having a pair of...
US-8,016,254 Piezoelectric actuated gimbal
A gimbal is described and which includes a fixed base member defining an axis of rotation; a second member concentrically oriented relative to the axis of...
US-8,016,137 Wall-mountable storage system
A wall-mountable storage system, comprising a plurality of uprights having a mounting flange, an extending surface and a bracket interfacing flange, each...
US-8,016,023 Method and an apparatus for cooling a computer
A method including sensing a temperature of an electronic component in a portable computing device; circulating a fluid between one of a first heat transfer...
US-8,016,017 Barrier systems and associated methods, including vapor and/or fire barrier systems
Barrier systems and associated methods, including vapor and/or fire barrier systems, are disclosed herein. One aspect of the invention is directed toward a...
US-D645,210 Helmet
US-D645,110 Firearm forend and thumbhole stock
US-8,015,460 Test mode for parallel load of address dependent data to enable loading of desired data backgrounds
One or more embodiments of the invention enable a memory device to load its memory array with desired background data, such as to reduce total test time and...
US-8,015,384 Memory hub architecture having programmable lane widths
A processor-based system includes a processor coupled to a system controller through a processor bus. The system controller is used to couple at least one input...
US-8,014,993 Transportable volume, local environment repository
An operating environment emulation system includes a separate peripheral emulation system having a memory device. The memory device is operable to store one or...
US-8,014,222 Control of inputs to a memory device
A memory device includes a command decoder and control interface logic. One or more external inputs, such as row and column address strobes, communicate with...
US-8,014,220 Current mode data sensing and propagation using voltage amplifier
A method and a circuit for current mode data sensing and propagation by using voltage amplifier are provided. Example embodiments may include providing an...
US-8,014,216 Devices, systems, and methods for a power generator system
Methods, devices, and systems are provided for a power generator system. The power generator system may include at least one control device including control...
US-8,014,208 Erase verification for flash memory
Example embodiments for verifying an erase operation for a flash memory device may comprise, for one or more embodiments, utilizing program operation...
US-8,014,195 Single transistor memory cell
A semiconductor device along with circuits including the same and methods of operating the same are described. The device comprises a memory cell including one...
US-8,014,023 System and method for identifying attributes of a printed image
Memorializing a printed image, including detecting at least one attribute associated with the originally printed image, the attribute identifying a ...
US-8,013,915 Anti-eclipsing circuit for image sensors
An anti-eclipse circuit of an image pixel includes a clamping circuit for pulling up a voltage of a reset signal output by the pixel and an eclipse detection...
US-8,013,579 Voltage trimming
Embodiments are provided that include a memory die, memory devices, and methods, such as those comprising a voltage generator, including an output voltage and...
US-8,013,411 Method and structure to reduce optical crosstalk in a solid state imager
Methods and structures to reduce optical crosstalk in solid state imager arrays. Sections of pixel material layers that previously would have been etched away...
US-8,013,376 Memory arrays, semiconductor constructions and electronic systems with transistor gates extending partially...
Some embodiments include DRAM having transistor gates extending partially over SOI, and methods of forming such DRAM. Unit cells of the DRAM may be within...
US-8,013,371 Ultra thin TCS (SiCl.sub.4) cell nitride for DRAM capacitor with DCS (SiH.sub.2Cl.sub.2) interface seeding layer
A method for forming silicon nitride films on semiconductor devices is provided. In one embodiment of the method, a silicon-comprising substrate is first...
US-8,012,859 Atomic layer deposition of silicon and silicon-containing films
A method is provided for depositing silicon and silicon-containing films by atomic layer deposition (ALD). The method includes disposing the substrate in a...
US-8,012,847 Methods of forming trench isolation in the fabrication of integrated circuitry and methods of fabricating...
First and second isolation trenches are formed into semiconductive material of a semiconductor substrate. The first isolation trench has a narrowest outermost...
US-8,012,776 Methods of manufacturing imaging device packages
Methods of manufacturing an imaging device package are provided. In accordance with an embodiment a sensor die may be coupled to bond pads on a transparent...
US-8,012,674 Efficient pitch multiplication process
Pitch multiplied and non-pitch multiplied features of an integrated circuit, e.g., features in the array, interface and periphery areas of the integrated...
US-8,012,532 Methods of making crystalline tantalum pentoxide
There is disclosed a method of forming crystalline tantalum pentoxide on a ruthenium-containing material having an oxygen-containing surface wherein the...
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