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Patent # Description
US-8,037,378 Automatic test entry termination in a memory device
A memory device has a control register comprising a test mode disable bit. The test mode is initially enabled. If the device does not receive an appropriate key...
US-8,037,237 Method and circuit for adjusting a self-refresh rate to maintain dynamic data at low supply voltages
A method and circuit for refreshing dynamic data stored in an integrated circuit are disclosed. The integrated circuit receives a supply voltage and operates in...
US-8,036,629 Methods of operating electronic devices, and methods of providing electronic devices
Some embodiments include a method disposing an integrated circuit die within a housing, the integrated circuit die having integrated circuitry formed thereon,...
US-8,036,544 Image forming apparatus and method of detecting amount of residual developer
An image forming apparatus has a developer container containing a developer and a developer carrying member for carrying the developer and adapted to switch an...
US-8,036,334 Delay lock loop phase glitch error filter
A method and apparatus is provided for providing a phase glitch error filter for a delay lock loop. The device comprises a delay lock loop to provide an output...
US-8,036,058 Symmetrically operating single-ended input buffer devices and methods
Embodiments are described including those pertaining to an input buffer having first and second complementary input terminals. One such input buffer has a...
US-8,036,035 Erase cycle counter usage in a memory device
Memory devices and methods are disclosed to facilitate adjustment of program voltages applied during a program operation based upon erase operation cycle...
US-8,036,019 Resistive memory
The present disclosure includes resistive memory devices and systems having resistive memory cells, as well as methods for operating the resistive memory cells....
US-8,036,016 Maintenance process to enhance memory endurance
Subject matter disclosed herein relates to enhancing an operational lifespan of non-volatile memory.
US-8,036,013 Using higher current to read a triggered phase change memory
A phase change memory cell may be read by driving a current through the cell higher than its threshold current. A voltage derived from the selected column may...
US-8,035,974 Integrated circuit package support system
A system for supporting integrated circuit packages to prevent mechanical failure of the packages at their connection to a printed circuit board or card...
US-8,035,455 Oscillator amplitude control network
An amplitude control circuit (100) can include a peak level detect circuit (102) that generates a peak voltage signal (Vpeak') based on a peak level of signal...
US-8,035,433 Process insensitive delay line
A delay line including a phase detector having two inputs and one output. The first input of the phase detector is connected to an input of the delay line. The...
US-8,035,403 Wireless soil sensor utilizing a RF frequency for performing soil measurements
A wireless soil sensor for using a RF frequency for performing soil moisture measurements is disclosed herein. The sensor preferably includes a sensing...
US-8,035,189 Semiconductor constructions
The invention includes methods of forming oxide structures under corners of transistor gate stacks and adjacent trenched isolation regions. Such methods can...
US-8,035,179 Packaged microelectronic imagers and methods of packaging microelectronic imagers
Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in...
US-8,035,160 Recessed access device for a memory
Semiconductor memory devices having recessed access devices are disclosed. In some embodiments, a method of forming the recessed access device includes forming...
US-8,035,142 Deuterated structures for image sensors and methods for forming the same
A pixel cell with a photo-conversion device and at least one structure includes a deuterated material adjacent the photo-conversion device.
US-8,035,129 Integrated circuitry
This invention includes methods of forming layers comprising epitaxial silicon, and field effect transistors. In one implementation, a method of forming a layer...
US-8,034,728 Systems and methods for forming metal oxides using metal diketonates and/or ketoimines
A method of forming (and an apparatus for forming) a metal oxide layer on a substrate, particularly a semiconductor substrate or substrate assembly, using a...
US-8,034,716 Semiconductor structures including vertical diode structures and methods for making the same
Semiconductor structures and methods of making a vertical diode structure are provided. The vertical diode structure may have associated therewith a diode...
US-8,034,706 Contact formation
The present disclosure includes various method of contact embodiments. One such method embodiment includes creating a trench in an insulator stack material of a...
US-8,034,702 Methods of forming through substrate interconnects
A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the...
US-8,034,687 Methods of forming a plurality of transistor gates, and methods of forming a plurality of transistor gates...
A method of forming a plurality of transistor gates having at least two different work functions includes forming first and second transistor gates over a...
US-8,034,655 Non-volatile resistive oxide memory cells, non-volatile resistive oxide memory arrays, and methods of forming...
A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate....
US-8,034,516 Photomasks, methods of forming photomasks, and methods of photolithographically-patterning substrates
Some embodiments include methods of forming photomasks. A stack of at least three different materials is formed over a base. Regions of the stack are removed to...
US-8,034,315 Methods of forming devices comprising carbon nanotubes
Some embodiments include devices that contain bundles of CNTs. An undulating topography extends over the CNTs and within spaces between the CNTs. A global...
US-8,034,113 Joint prosthesis and method of implanting same
A novel and improved canine elbow prosthesis and method of implanting same including a unique bi-compartmental prosthesis having bone receiving members and...
US-8,033,884 Methods of forming plasma-generating structures; methods of plasma-assisted etching, and methods of...
Some embodiments include methods of forming plasma-generating microstructures. Aluminum may be anodized to form an aluminum oxide body having a plurality of...
US-8,033,332 Apparatus and method for perforating and fracturing a subterranean formation
A device for perforating and fracturing a formation in a single trip includes shaped charges and a volume of a gas generator. When activated by detonation of...
US-8,032,977 Air moving device and method of making
The invention is a device and a method for manufacturing the device, namely an air moving device, such as a vacuum cleaner, yard air blower, or other air moving...
US-D646,561 Container
US-RE42,821 Method for electronic tracking of units associated with a batch
.[.In one aspect, the invention encompasses a method for electronic tracking of units originating from a common source which comprises a plurality of units...
US-8,032,804 Systems and methods for monitoring a memory system
Systems and methods are disclosed herein, including those that operate to monitor a first set of operational parameters associated with a memory vault, to...
US-8,032,778 Clock distribution apparatus, systems, and methods
Apparatus, systems, and methods are disclosed that operate to adjust power received by a clock distribution network at least partially based on operating...
US-8,032,694 Direct logical block addressing flash memory mass storage architecture
A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle...
US-8,032,350 Techniques for generating and simulating a simulatable vector having amplitude noise and/or timing jitter added...
Methods for generating realistic waveform vectors with controllable amplitude noise and timing jitter, simulatable in a computer-based simulation environment...
US-8,031,825 Non-destructive testing method and apparatus
Non-destructive testing apparatus may comprise a photon source and a source material that emits positrons in response to bombardment of the source material with...
US-8,031,529 Memory cell threshold voltage drift estimation methods and apparatus
Methods of operating memory devices include determining a threshold voltage drift of two or more reference memory cells of the memory device programmed to only...
US-8,031,518 Methods, structures, and devices for reducing operational energy in phase change memory
Methods of forming and operating phase change memory devices include adjusting an activation energy barrier between a metastable phase and a stable phase of a...
US-8,031,510 Ion barrier cap
An ion barrier layer made from a dielectric material in contact with an electronically insulating layer is operative to prevent mobile ions transported into the...
US-8,031,509 Conductive metal oxide structures in non-volatile re-writable memory devices
A memory cell including a memory element comprising an electrolytic insulator in contact with a conductive metal oxide (CMO) is disclosed. The CMO includes a...
US-8,031,249 Missing pixel architecture
An active pixel sensor (APS) comprises a regular repeating pattern of geometrically similar pixel regions, active pixels of which have photodiodes formed...
US-8,031,053 RFID label time synchronization
Methods and apparatus, including computer program products, for radio frequency identification (RFID) label time synchronization. A method includes, in a radio...
US-8,030,952 Power sink for IC temperature control
The use of a power sink function in IC testing results in a simple and rapid method for testing ICs, and assembled modules, at elevated temperature profiles...
US-8,030,786 System for generating electrical energy from ambient energy
A system for generating electrical energy from ambient energy such as the energy of ambient motion and acoustic vibrations. The system has at least two stages,...
US-8,030,780 Semiconductor substrates with unitary vias and via terminals, and associated systems and methods
Semiconductor substrates with unitary vias and via terminals, and associated systems and methods are disclosed. A representative method in accordance with a...
US-8,030,751 Board-on-chip type substrates with conductive traces in multiple planes and semiconductor device packages...
A method for fabricating a chip-scale board-on-chip substrate, or redistribution element, includes forming conductive planes on opposite sides of a substrate. A...
US-8,030,748 Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing...
A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second ...
US-8,030,636 Enhanced memory density resistance variable memory cells, arrays, devices and systems including the same, and...
A resistance variable memory cell and method of forming the same. The memory cell includes a first electrode and at least one layer of resistance variable...
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