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Patent # Description
US-7,956,443 Through-wafer interconnects for photoimager and memory wafers
A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making...
US-7,956,426 Lanthanide dielectric with controlled interfaces
Methods and devices for a dielectric are provided. One method embodiment includes forming a passivation layer on a substrate, wherein the passivation layer...
US-7,956,416 Integrated circuitry
Some embodiments include formation of at least one cavity in a first semiconductor material, followed by epitaxially growing a second semiconductor material...
US-7,956,402 Double-doped polysilicon floating gate
The present invention provides a method and apparatus for forming a double-doped polysilicon floating gate in a semiconductor memory element. The method...
US-7,956,396 Memory array having floating gate semiconductor device
A method for forming a floating gate semiconductor device such as an electrically erasable programmable read only memory is provided. The device includes a...
US-7,955,976 Methods of forming semiconductor structures
The present invention relates to methods of forming semiconductor structures. The methods may include disposing electrically conductive material within an...
US-7,955,946 Methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit,...
The invention includes methods of determining x-y spatial orientation of a semiconductor substrate comprising an integrated circuit, methods of positioning a...
US-7,955,935 Non-volatile memory cell devices and methods
A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming an intergate dielectric layer over the nanodots,...
US-7,955,917 Fabrication of self-aligned gallium arsenide MOSFETS using damascene gate methods
A method for fabricating a gallium arsenide MOSFET device is presented. A dummy gate is formed over a gallium arsenide substrate. Source-drain extensions are...
US-7,955,898 Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices
Packaged microelectronic devices and methods for manufacturing packaged microelectronic devices are disclosed. In one embodiment, a method for forming a...
US-7,955,764 Methods to make sidewall light shields for color filter array
Methods of forming color filters having a light blocking material therebetween. A color filter is formed such that a trench is defined between a color filter...
US-7,954,971 Offset mountable light accessory
An offset mountable light, including a light body, wherein the light body includes a battery compartment positioned within a cavity formed by the light body; a...
US-7,954,654 Bow caddy
A collapsible bow holder that fits over the back of a car or truck seat to facilitate the ready access to a bow in the event that a sportsman wants to deploy it...
US-7,954,409 Loading system and method for elastic projectile
A method for forming a projectile cartridge includes positioning a sabot within a compartment of a projectile cartridge casing. A delivery tube is inserted...
US-7,954,271 Firearm monopod
A monopod for a firearm is disclosed. The monopod has a body and a leg that can extend from the body. The monopod may fit into a pistol grip of a firearm, such...
US-7,954,270 Reversible rail for a firearm
A mounting rail for a firearm is disclosed. The mounting rail may be a picatinny rail, a weaver rail, or the like, which allows tools such as lights or lasers...
US-7,954,268 Torsion spring recoil system for the forend of a firearm
A recoil reduction system for use with firearms. The recoil reduction system includes a cam coupled with a torsion spring which can provide resistance to a...
US-D639,510 Nail trimmer--center lever
US-D639,509 Nail trimmer-rounded
US-D639,067 Yarn caddy
US-RE42,423 Contact method for thin silicon carbide epitaxial layer and semiconductor devices formed by those methods
Provided is a process for forming a contact for a compound semiconductor device without electrically shorting the device. In one embodiment, a highly doped...
US-7,954,031 Method and apparatus for generating expect data from a captured bit pattern, and memory device using same
Expect data signals are generated for a series of applied data signals having a known sequence to determine if groups of the data signals were properly...
US-7,954,029 System, apparatus, and method for memory built-in self testing using microcode sequencers
Apparatuses, systems, and methods are disclosed for performing Built-In Self Tests (BIST) on memories. One such BIST includes loading microcode instructions...
US-7,954,004 Systems and methods for retrieving data
Apparatus and methods, such as those that read data from non-volatile integrated circuit memory devices, such as NAND flash. For example, disclosed techniques...
US-7,953,954 Flash storage partial page caching
Methods and apparatus may operate to receive allocation requests from a processor configured to manage memory comprising a non-volatile memory device...
US-7,953,579 Jittery signal generation with discrete-time filtering
The computer-implementable method allows for the fast creation of a multi-unit interval data signal suitable for simulation. The created signal represents the...
US-7,952,952 Reduction of fusible links and associated circuitry on memory dies
The number of fusible links and other circuit components required to provide memory cell redundancy are reduced by sharing physical memory locations among...
US-7,952,936 Program-verify method
Methods and devices are disclosed, some such methods comprising applying a verify pass-through voltage to unselected select lines of the floating-gate memory...
US-7,952,927 Adjusting program and erase voltages in a memory device
A method and apparatus for adjusting threshold program and erase voltages in a memory array, such as a floating gate memory array, for example. A method...
US-7,952,924 NAND memory device and programming methods
A NAND Flash memory device is described that can reduce bit line coupling and floating gate coupling during program and verify operations. Consecutive bit lines...
US-7,952,922 Method for programming a non-volatile memory device to reduce floating-gate-to-floating-gate coupling effect
A method for programming a non-volatile memory array comprising a plurality of memory cells. Each cell is adapted to store a lower and an upper page of data....
US-7,952,919 Phase change memory structure with multiple resistance states and methods of programming and sensing same
A phase change memory structure with multiple resistance states and methods of forming, programming, and sensing the same. The memory structure includes two or...
US-7,952,913 Back gated SRAM cell
One method for operating an SRAM cell includes applying a potential to a back gate of a pair of cross coupled p-type pull up transistors in the SRAM during a...
US-7,952,760 Color management system that enables dynamic balancing of performance with flexibility
A method and system for allowing a computer system platform the ability to intervene in the content workflow and perform additional color management based upon...
US-7,952,631 CMOS imager with integrated circuitry
A CMOS imager is integrated on a single substrate along with logic and support circuitry for decoding and processing optical information received by the CMOS...
US-7,952,184 Distributed semiconductor device methods, apparatus, and systems
Some embodiments include a device having a number of memory cells and associated circuitry for accessing the memory cells. The memory cells of the device may be...
US-7,952,174 Method and apparatus providing air-gap insulation between adjacent conductors using nanoparticles
A semiconductor device and a method of forming it are disclosed in which at least two adjacent conductors have an air-gap insulator between them which is...
US-7,952,171 Die stacking with an annular via having a recessed socket
A die stack including a die having an annular via with a recessed conductive socket and methods of forming the die stack provide a structure for use in a...
US-7,952,170 System including semiconductor components having through interconnects and back side redistribution conductors
A system includes a supporting substrate and at least one semiconductor substrate. The semiconductor component includes a semiconductor substrate having a...
US-7,952,169 Isolation circuit
An isolation circuit, comprising a first transistor having a gate, a first source/drain terminal, and a second source/drain terminal, a first pad coupled to the...
US-7,952,158 Elevated pocket pixels, imaging devices and systems including the same and method of forming the same
An elevated photosensor for image sensors and methods of forming the photosensor. The photosensor may have light sensors having indentation features including,...
US-7,952,155 Reduced edge effect from recesses in imagers
Methods for making a recessed color filter array for a semiconductor imager employing a sidewall spacer for reducing an edge effect from the array are...
US-7,951,709 Method and apparatus providing integrated circuit having redistribution layer with recessed connectors
A method of making a semiconductor die includes forming a trench around a conductive stud extending from the first side to a second side of a substrate to...
US-7,951,702 Methods for fabricating semiconductor components with conductive interconnects having planar surfaces
A backside method for fabricating a semiconductor component with a conductive interconnect includes the step of providing a semiconductor substrate having a...
US-7,951,646 Solder ball landpad design to improve laminate performance
A method and apparatus for improving the laminate performance of the solder balls in a BGA package. Specifically, the ball pads on the substrate are configured...
US-7,951,619 Diodes, and methods of forming diodes
Some embodiments include methods of forming diodes. The methods may include oxidation of an upper surface of a conductive electrode to form an oxide layer over...
US-7,951,414 Methods of forming electrically conductive structures
Some embodiments include methods of forming conductive material within high aspect ratio openings and low aspect ratio openings. Initially, the high aspect...
US-7,951,283 High temperature electrolysis for syngas production
Syngas components hydrogen and carbon monoxide may be formed by the decomposition of carbon dioxide and water or steam by a solid-oxide electrolysis cell to...
US-7,951,271 System for recovering oil from used automobile tires
Described is an apparatus for recovery of energy and by-products from automobile and truck tires. The tires are heated in an oxygen poor environment, and the...
US-7,950,892 Side puller accessory frame for a car carrier and for a tow truck
A side puller accessory frame for a tow truck having a cab and a truck frame mounts to the truck frame behind the cab. The accessory frame preferably includes...
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