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Patent # Description
US-7,928,579 Devices including sloped vias in a substrate and devices including spring-like deflecting contacts
Methods for forming vias are disclosed. The methods include providing a substrate having a first surface and an opposing, second surface. The vias are formed...
US-7,928,577 Interconnect structures for integration of multi-layered integrated circuit devices and methods for forming the...
Semiconductor devices comprise at least one integrated circuit layer, at least one conductive trace and an insulative material adjacent at least a portion of...
US-7,928,503 Memory cells
Some embodiments include methods of forming memory cells. Dopant is implanted into a semiconductor substrate to form a pair of source/drain regions that are...
US-7,928,292 Refined plant transformation
The present invention provides methods for producing transgenic plants based on an optimized transfer of DNA from Agrobacterium to plant cells, and/or on an...
US-7,928,019 Semiconductor processing
Embodiments of the present disclosure include semiconductor processing methods and systems. One method includes forming a material layer on a semiconductor...
US-7,927,996 Tungsten-doped indium oxide structures and methods
Methods of forming transparent conducting oxides and devices formed by these methods are shown. Monolayers that contain tungsten and monolayers that contain...
US-7,927,975 Semiconductor material manufacture
Electronic apparatus, systems, and methods include a semiconductor layer bonded to a bulk region of a wafer or a substrate, in which the semiconductor layer can...
US-7,927,964 Methods of forming electrically insulative materials, methods of forming low k dielectric regions, and methods...
Some embodiments include methods of forming low k dielectric regions between electrically conductive lines. A construction may be formed to have a plurality of...
US-7,927,948 Devices with nanocrystals and methods of formation
An aspect relates to a method of growing nanoscale structures on a semiconductor substrate. According to various embodiments, nucleation sites are created on a...
US-7,927,944 ESD protection transistor
An electrostatic discharge (ESD) transistor structure includes a self-aligned outrigger less than 0.4 microns from a gate electrode that is 50 microns wide. The...
US-7,927,938 Fin-JFET
Methods, devices, and systems integrating Fin-JFETs and Fin-MOSFETs are provided. One method embodiment includes forming at least on Fin-MOSFET on a substrate...
US-7,927,923 Method and apparatus for directing molding compound flow and resulting semiconductor device packages
Flow diverting structures for preferentially impeding, redirecting or both impeding and redirecting the flow of flowable encapsulant material, such as molding...
US-7,927,916 Optic wafer with reliefs, wafer assembly including same and methods of dicing wafer assembly
An optic wafer for assembly with an imager wafer, the optic wafer comprising a plurality of reliefs in a surface thereof coincident with street locations...
US-7,927,635 Nematicides from Juglandaceae and methods of use thereof
The invention provides compositions and methods for inhibiting nematode damage to plants. The compositions comprise acid extracts or alcohol extracts from...
US-7,927,500 Poly etch without separate oxide decap
The use of an ammonium hydroxide spike to a hot tetra methyl ammonium hydroxide (TMAH) solution to form an insitu poly oxide decapping step in a polysilicon...
US-7,927,227 Golf swing alignment training device
Golfers need and desire to practice and perfect their golf swings, and proper alignment of the golfer's body and the arc that the head of club travels are...
US-7,927,181 Apparatus for removing material from microfeature workpieces
Machines and systems for removing materials from microfeature workpieces using fixed-abrasive mediums. One embodiment of a method for removing material from a...
US-7,926,216 Recoil suppression system for the stock of a firearm
A recoil suppression system for the stock of a firearm that includes an absorption assembly having an elongated body portion and a generally flat mounting plate...
US-7,926,188 System and method for creating purportionately accurate figures
A system and method for producing proportionately accurate likenesses in an artwork is presented. The system uses a grid or other distance markers on a...
US-7,926,132 Rescue litter attachment system
This invention discloses a rescue stretcher or rescue litter and which includes a variable angle rail adapter with an adapter body with rail apertures...
US-D636,537 Mask
US-D636,535 Face drape for use with goggles
US-7,925,949 Embedded processor
Electronic apparatus, systems, and methods of operating and constructing the electronic apparatus and/or systems include an embedded processor disposed in a...
US-7,925,912 Method and apparatus for fine edge control on integrated circuit outputs
A device for adjusting the timing of at least one edge of an output pulse created in response to a reference pulse is disclosed. Such a device may include a...
US-7,925,910 Systems, methods and devices for limiting current consumption upon power-up
Embodiments are described including those for controlling peak current consumption of a multi-chip memory package during power-up. In one embodiment, each...
US-7,925,900 I/O co-processor coupled hybrid computing device
An apparatus and method provide power to perform functions on a computing device. In one example, the apparatus contains multiple processors that may operate at...
US-7,925,844 Memory register encoding systems and methods
Apparatus, systems, and methods are disclosed that operate to encode register bits to generate encoded bits such that, for pairs of addresses, an encoded bit to...
US-7,925,805 Critical resource management
In one embodiment, a method of managing critical resource usage in a storage network comprises receiving, in a storage controller, an input/output operation...
US-7,925,044 Detecting online abuse in images
Tools for analyzing images are disclosed. In some cases, the images are analyzed in order to determine whether a particular web site and/or email message is...
US-7,924,630 Techniques for simultaneously driving a plurality of source lines
Techniques for simultaneously driving a plurality of source lines are disclosed. In one particular exemplary embodiment, the techniques may be realized as an...
US-7,924,623 Method for memory cell erasure with a programming monitor of reference cells
Embodiments of the present disclosure provide methods, devices, modules, and systems for operating memory cells. One method includes: performing an erase...
US-7,924,619 Programming method to reduce word line to word line breakdown for NAND flash
A NAND architecture non-volatile memory device and programming process programs the various cells of strings of non-volatile memory cells by the application of...
US-7,924,617 Selective threshold voltage verification and compaction
Non-volatile memory devices for providing selective compaction verification and/or selective compaction to facilitate a tightening of the distribution of...
US-7,924,616 Word line voltage boost system and method for non-volatile memory devices and memory devices and...
The voltage of a selected word line is increased beyond the voltage to which a respective string driver transistor is capable of driving the word line by...
US-7,924,608 Forced ion migration for chalcogenide phase change memory device
Non-volatile memory devices with two stacked layers of chalcogenide materials comprising the active memory device have been investigated for their potential as...
US-7,924,603 Resistance variable memory with temperature tolerant materials
A PCRAM memory device having a chalcogenide glass layer, preferably comprising antimony selenide having a stoichiometric formula of about Sb.sub.2Se.sub.3, and...
US-7,924,520 Method and apparatus for determining position of a storage medium
A system and method for determining the value of a longitudinal position ("LPOS") bit of a storage medium. A system comprises a selector that selects a value...
US-7,924,337 Dual panel pixel readout in an imager
An imager having two panels of pixels (i.e., the imager's rows of pixels are split into two panels) that are controllable by separate row decoders. The dual...
US-7,924,333 Method and apparatus providing shared pixel straight gate architecture
Methods and apparatuses using four-way-shared readout circuits to increase pixel fill factor. Embodiments consolidate circuits from several pixels, reducing the...
US-7,924,067 Low current wide V.sub.REF range input buffer
A low-current input buffer is disclosed. The buffer uses self-biased N and P channel differential pairs with their outputs tied together. The self-biasing...
US-7,923,824 Microelectronic component assemblies and microelectronic component lead frame structures
The present invention provides microelectronic component assemblies and lead frame structures that may be useful in such assemblies. For example, one such lead...
US-7,923,692 Radioisotope Detection Device and Methods of Radioisotope Collection
A device for collection of radionuclides includes a mixture of a polymer, a fluorescent organic scintillator and a chemical extractant. A radionuclide detector...
US-7,923,600 Generation of marker-free and backbone-free transgenic plants using a single binary approach
The present invention provides a convenient method for producing a transformed plant by expressing a hormone gene positioned within a plasmid backbone that also...
US-7,923,381 Methods of forming electronic devices containing Zr-Sn-Ti-O films
A dielectric film containing Zr--Sn--Ti--O and methods of fabricating such a dielectric film produce a reliable dielectric layer having an equivalent oxide...
US-7,923,373 Pitch multiplication using self-assembling materials
Self-assembling materials, such as block copolymers, are used as mandrels for pitch multiplication. The copolymers are deposited over a substrate and directed...
US-7,923,364 Tunnel dielectric comprising nitrogen for use with a semiconductor device and a process for forming the device
A method used during semiconductor device fabrication comprises forming at least two types of transistors. A first transistor type may comprise a CMOS...
US-7,923,322 Method of forming a capacitor
A method of forming a capacitor includes forming a first capacitor electrode over a substrate. A substantially crystalline capacitor dielectric layer is formed...
US-7,923,308 Methods of forming conductive contacts to source/drain regions and methods of forming local interconnects
The invention comprises methods of forming a conductive contact to a source/drain region of a field effect transistor, and methods of forming local...
US-7,923,298 Imager die package and methods of packaging an imager die on a temporary carrier
Methods for fabricating an imager die package and resulting die packages are disclosed. An imager die packaging process may include dicing through a fabrication...
US-7,923,234 Thermal and acid tolerant beta-xylosidases, genes encoding, related organisms, and methods
Isolated and/or purified polypeptides and nucleic acid sequences encoding polypeptides from Alicyclobacillus acidocaldarius and variations thereof are provided....
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