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Patent # Description
US-7,902,081 Methods of etching polysilicon and methods of forming pluralities of capacitors
A method of etching polysilicon includes exposing a substrate comprising polysilicon to a solution comprising water, HF, and at least one of a conductive metal...
US-7,902,074 Simplified pitch doubling process flow
A method for fabricating a semiconductor device comprises patterning a layer of photoresist material to form a plurality of mandrels in a device array region....
US-7,902,057 Methods of fabricating dual fin structures
Fin-FET devices and methods of fabrication are disclosed. The Fin-FET devices include dual fins that may be used to provide a trench region between a source...
US-7,902,028 Methods of forming field effect transistors, methods of forming field effect transistor gates, methods of...
The invention includes methods of forming field effect transistors, methods of forming field effect transistor gates, methods of forming integrated circuitry...
US-7,901,995 Interconnections resistant to wicking
The present invention relates generally to permanent interconnections between electronic devices, such as integrated circuit packages, chips, wafers and printed...
US-7,901,233 Electrical connectors and methods of manufacturing and using same
An electrical connector forms electrical contact by tightening of a movable, electrically-conductive spiral around un-insulated wire or wires. The spiral coils...
US-7,901,035 Directed flow drip bib for printhead with three point contact
A drip bib for use with a printhead of an imaging device includes a plate having an upper surface having an upper edge, an intermediate surface angled with...
US-7,900,877 Active winglet
An active winglet includes a body portion substantially parallel to a wing of an aircraft, as if it were an extension of the wing, and an angled portion that...
US-7,900,797 Lid separator and dispensing device
A beverage container lid separator and dispenser is provided which allows individual beverage container lids to be dispensed in a neat and sanitary manner. The...
US-7,900,710 Power cup cutter
There is provided an improved, simple and effective, powered hole-cutting apparatus, otherwise referred to as a power cup cutter, comprised of a USGA approved...
US-7,900,405 Spherical dome
The invention is a spherical dome consisting of continuous prismatic members in three layers, an outer layer, a middle layer, and an inner layer. The continuous...
US-7,900,391 Bore sight apparatus
An apparatus is provided for traversing a barrel of a gun and disposing at a select position therein. The apparatus includes a bore-rider assembly and a...
US-7,900,162 Read strobe feedback in a memory system
A controller circuit is coupled to a memory device over a data/IO bus and a control bus. The controller circuit generates a read enable signal that is...
US-7,900,120 Memory system and method using ECC with flag bit to identify modified data
A DRAM device includes an ECC generator/checker that generates ECC syndromes corresponding to items of data stored in the DRAM device. The DRAM device also...
US-7,900,099 Enabling test modes of individual integrated circuit devices out of a plurality of integrated circuit devices
Methods and apparatus are provided. A common test-mode enable signal is received at two or more integrated circuit devices of an electronic system. A test mode...
US-7,899,653 Matrix modeling of parallel data structures to facilitate data encoding and/or jittery signal generation
A computer-implementable method comprises a matrix-based approach to generating in parallel a plurality of realistic simulatable signal vectors, which vectors...
US-7,898,901 Method for controlling clock cycle time for reduced power consumption in a semiconductor memory device
Some embodiments include a delay line configured to apply a delay to an input signal to provide an output signal; an input circuit configured to provide the...
US-7,898,892 Method and system for controlling refresh to avoid memory cell data losses
A DRAM includes a register storing subsets of row addresses corresponding to rows containing at least one memory cell that is unable to store a data bit during a...
US-7,898,885 Analog sensing of memory cells in a solid state memory device
A memory device that includes a sample and hold circuit coupled to a bit line. The sample and hold circuit stores a target threshold voltage for a selected...
US-7,898,863 Method, apparatus, and system for improved read operation in memory
Various embodiments include methods, apparatus, and systems for reading an adjacent cell of a memory array in an electronic device to determine a threshold...
US-7,898,861 Reducing effects of program disturb in a memory device
A method for programming that biases a selected word line with a programming voltage. An unselected word line on the source side and an unselected word line on...
US-7,898,859 Use of emerging non-volatile memory elements with flash memory
Memory devices and methods of operating memory devices are provided, such as those that involve a memory architecture that replaces typical static and/or dynamic...
US-7,898,857 Memory structure having volatile and non-volatile memory portions
A memory array is provided that includes a transistor having two active gates sharing a source, a drain, and a channel of the transistor. One of the active gates...
US-7,898,856 Memory cell heights
Embodiments of the present disclosure provide methods, arrays, devices, modules, and systems for memory cell heights. One array of memory cells includes a number...
US-7,898,850 Memory cells, electronic systems, methods of forming memory cells, and methods of programming memory cells
Some embodiments include memory cells having vertically-stacked charge-trapping zones spaced from one another by dielectric material. The dielectric material may...
US-7,898,588 Dual conversion gain gate and capacitor and HDR combination
A pixel circuit having a shared control line for providing two control signals to the pixel array. One control line is used to provide a control signal to both a...
US-7,898,390 Phase shifters, interrogators, methods of shifting a phase angle of a signal, and methods of operating an...
An interrogator provides a phase shifter including a first power divider configured to receive a signal and provide plural quadrature components of the signal;...
US-7,898,389 Radio frequency identification (RFID) tags and methods of communicating between a radio frequency...
The present invention provides communication devices, communication systems and methods of communicating. According to one embodiment of the invention, a...
US-7,898,337 High slew rate amplifier, analog-to-digital converter using same, CMOS imager using the analog-to-digital...
An amplifier, which may be used in a pipelined analog-to-digital converter, includes a first amplifier stage driving a second amplifier stage. At least one...
US-7,898,308 Apparatus and method for trimming static delay of a synchronizing circuit
A system and method for trimming an unadjusted forward delay of a delay-locked loop (DLL) and trimming a duty cycle of first and second output clock signals...
US-7,898,294 Pre-driver logic
At least one of the disclosed systems includes driver logic that is capable of driving a device and pre-driver logic coupled to the driver logic and that drives...
US-7,898,290 Method and apparatus for high resolution ZQ calibration
A method is disclosed for controlling an output impedance of an electronic device of the type having an impedance control terminal to which an external load is...
US-7,898,064 Methods for forming through wafer interconnects and structures resulting therefrom
The present invention relates to methods for forming through-wafer interconnects in semiconductor substrates and the resulting structures. In one embodiment, a...
US-7,898,062 Epitaxial semiconductor layer and method
A method for epitaxially forming a first semiconductor structure attached to a second semiconductor structure is provided. Devices and methods described include...
US-7,898,022 Scalable multi-functional and multi-level nano-crystal non-volatile memory device
A multi-functional and multi-level memory cell is comprised of a tunnel layer formed over a substrate. In one embodiment, the tunnel layer is comprised of two...
US-7,898,019 Semiconductor constructions having multiple patterned masking layers over NAND gate stacks
Some embodiments include methods of forming a NAND cell unit having a NAND string gate closest to a select gate with a different width than other NAND string...
US-7,898,017 Floating-gate memory cell and memory device and electronic system therewith
A floating-gate memory cell has a tunnel dielectric layer that overlies a silicon-containing semiconductor substrate and that is adjacent a trench formed in the...
US-7,898,010 Transparent conductor based pinned photodiode
A pinned photodiode with improved short wavelength light response. In exemplary embodiments of the invention, a gate oxide is formed over a doped, buried region...
US-7,898,009 Independently-double-gated transistor memory (IDGM)
Memory cells are constructed from double-gated four terminal transistors having independent gate control. DRAM cells may use one, two or three transistors....
US-7,897,953 Multi-level programmable PCRAM memory
A series of phase change material layers sandwiched between a bottom electrode and a top electrode may have different phase change temperatures selected to...
US-7,897,904 Method and apparatus for controlling anti-blooming timing to reduce effects of dark current
An electronic imager includes a plurality of pixels having photosensors for accumulating charge corresponding to individual pixel values of a sensed image. Each...
US-7,897,517 Method of selectively depositing materials on a substrate using a supercritical fluid
A method for depositing one or more materials on a substrate, such as for example, a semiconductor substrate that includes providing the substrate; applying a...
US-7,897,485 Wafer processing including forming trench rows and columns at least one of which has a different width
Methods for processing semiconductor wafers are described herein. One embodiment includes removing portions of a first side of the semiconductor wafer to form a...
US-7,897,470 Non-volatile memory cell device and methods
A method of fabricating a memory cell including forming nanodots over a first dielectric layer and forming a second dielectric layer over the nanodots, where the...
US-7,897,465 Semiconductor device having reduced sub-threshold leakage
A semiconductor device fabricated in the semiconductor substrate includes a FinFET transistor having opposed source and drain pillars, and a fin interposed...
US-7,897,460 Methods of forming recessed access devices associated with semiconductor constructions
The invention includes methods of forming recessed access devices. A substrate is provided to have recessed access device trenches therein. A pair of the...
US-7,897,040 Washbox
Exemplary systems and methods relating to washboxes are described.
US-7,896,939 Debris receiver
In one embodiment, an assembly including a receptacle having a drawer slidable in the receptacle for receiving debris into a suction debris collection system;...
US-7,896,823 Method and apparatus for treating wound using negative pressure therapy
Devices that employ external compression stocking-type garments in the treatment of edema, chronic wounds, deep venous thrombosis prevention or claudication all...
US-7,896,545 Apparatus and methods for temperature calibration and sensing
Some embodiments include apparatus and methods having a first switch, a second switch, and a circuit coupled to the first and second switches. The first switch...
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