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Patent # Description
US-7,879,249 Methods of forming a lens master plate for wafer level lens replication
Methods of forming a lens master plate. In one embodiment, a substrate is coated with a polymer material layer. Isolated sections are formed in the polymer...
US-7,879,236 Micro gas attendant system
A lagoon of effluent is established, comprising a set of sub-portions at different levels in the lagoon associated with a corresponding set of concentrations of...
US-7,878,892 Strategy indicating table gaming apparatuses and methods
Systems and methods for playing live casino games. The systems have changeable displays which portray virtual playing cards or symbols to live participants....
US-7,878,732 Systems and methods for providing a watercraft docking device
Systems and methods for providing a docking device for watercrafts. An apparatus that is configured to receive a watercraft and includes a fold down anchor on...
US-7,878,707 System and method for monitoring environmental conditions
A system and method are disclosed for monitoring environmental conditions of a perishable product. The system includes an environmental sensor configured to...
US-7,878,525 Fifth wheel hitch system
A precision, light weight, high strength hitch for coupling a trailer or other vehicle to a towing vehicle. The hitch includes a mounting ball attached to a...
US-7,878,469 Quick release screed bar holder
A novel adjustable screed bar holder used to support screed bars used in concrete finish work. The holder moves along a supporting device such as a stake, pin,...
US-7,878,097 Powered weed trimmer cutting head and method
A cutting head attached to a powered rotary weed cutting machine has a generally cylindrical structure containing a plurality of cutting blades. The cylindrical...
US-7,877,924 Fishing float or strike indicator and attachment methods
A float may be used as a strike indicator for fly fishing and may be attached without hooks, clamps, grommets, rubbery gripping members, or tying of the...
US-D632,042 Cylinder cart with lowering lever
US-D632,041 Cylinder cart with lowering lever and lifting eye
US-D631,941 Lawn mower cleaner
US-7,877,698 Spectrum analyzer user interface
A system comprising user interface software configured to provide a plurality of spectral data display and manipulation options on a display displaying spectral...
US-7,877,669 Non-volatile memory with error detection
Data move operations in a memory device are described that enable identification of data errors. Error detection circuitry in the memory device can be operated...
US-7,877,623 Method and apparatus for providing symmetrical output data for a double data rate DRAM
An apparatus and method is disclosed to compensate for skew and asymmetry of a locally processed system clock used to synchronize an output signal, e.g., a data...
US-7,877,612 System and method for controlling user access to an electronic device
A method and system for authenticating a user to access a computer system. The method comprises communicating security information to the computer system, and...
US-7,877,564 Memory configuration and method for calibrating read/write data based on performance characteristics of the...
A method and system for storing and retrieving data using flash memory devices. One example system includes an apparatus within a flash memory configuration. The...
US-7,877,530 Bus width negotiation
There is provided a method and apparatus for bus negotiation. One such method includes determining a configuration of a first bond pad, the first bond pad...
US-7,876,640 Control voltage tracking circuits, methods for recording a control voltage for a clock synchronization circuit...
Memories, clock synchronization circuits, clock synchronization controller circuits, and methods for setting a voltage controlled delay of a clock ...
US-7,876,639 Memory devices having redundant arrays for repair
Apparatus and methods are disclosed, such as those involving a memory device. One such memory device includes a memory array including a sub-array that includes...
US-7,876,638 Storing operational information in an array of memory cells
The present disclosure includes methods, devices, modules, and systems for storing operational information in an array of memory cells. One method embodiment...
US-7,876,623 Program method with optimized voltage level for flash memory
A non-volatile memory device and programming process is described that increases the programming voltage of successive programming cycles in relation to the...
US-7,876,622 Read method for MLC
Memory devices adapted to process and generate analog data signals representative of data values of two or more bits of information facilitate increases in data...
US-7,876,603 Spin current generator for STT-MRAM or other spintronics applications
Spin current generators and systems and methods for employing spin current generators. A spin current generator may be configured to generate a spin current...
US-7,876,597 NAND-structured series variable-resistance material memories, processes of forming same, and methods of using same
A variable-resistance material memory array includes a series of variable-resistance material memory cells. The series of variable-resistance material memory...
US-7,876,453 Laser ultrasonic multi-component imaging
Techniques for ultrasonic determination of the interfacial relationship of multi-component systems are discussed. In implementations, a laser energy source may...
US-7,875,912 Zr.sub.x Hf.sub.y Sn.sub.1-x-y O.sub.2 films as high k gate dielectrics
The use of atomic layer deposition (ALD) to form a nanolaminate dielectric of zirconium oxide (ZrO.sub.2), hafnium oxide (HfO.sub.2) and tin oxide (SnO.sub.2)...
US-7,875,840 Imager device with anti-fuse pixels and recessed color filter array
An imager device having a recessed color filter array formed in a trench of a material layer above a pixel array. Light-sensitive pixels are formed in the center...
US-7,875,821 Method for sorting integrated circuit devices
A method for sorting integrated circuit (IC) devices of the type having a substantially unique identification (ID) code, such as a fuse ID, including...
US-7,875,529 Semiconductor devices
Methods, devices, modules, and systems providing semiconductor devices in a stacked wafer system are described herein. One embodiment includes a first wafer for...
US-7,875,487 Passivation planarization
A pixel cell is formed by locating a first passivation layer over the final layer of metal lines. Subsequently, the uneven, non-uniform passivation layer is...
US-7,875,110 Electroless plating bath composition and method of use
An electroless plating composition comprising succinic acid, potassium carbonate, a source of cobalt metal ions, a reducing agent, and water is provided. An...
US-D631,378 Wireless soil sensor
US-D631,284 Top for beverage container
US-7,873,895 Memory subsystems with fault isolation
An exemplary memory subsystem with fault isolation comprises a first data bus routing data groupings in a lower 72 bits to a first memory expander, and a second...
US-7,873,882 Circuits and methods for repairing defects in memory devices
Some embodiments of the invention include a memory device has a number of memory segments connected to a supply source through a supply control circuit. The...
US-7,873,214 Unsupervised color image segmentation by dynamic color gradient thresholding
A method for segmenting an image includes computing a color gradient map based on an inputted image and selecting at least one initial seed of at least one pixel...
US-7,873,131 Phase splitter using digital delay locked loops
A phase splitter using digital delay locked loop (DLL) to receive complementary input clock signals to generate a plurality of output signals having different...
US-7,872,926 Input buffer and method with AC positive feedback, and a memory device and computer system using same
An input buffer having a comparator that receives an input signal, a reference signal and a positive feedback. The comparator compares the input signal relative...
US-7,872,924 Multi-phase duty-cycle corrected clock signal generator and memory having same
Memories, multi-phase clock signal generators, and methods for generating multi-phase duty cycle corrected clock signals are disclosed. For example, one such...
US-7,872,923 Low voltage sensing scheme having reduced active power down standby current
A low voltage sensing scheme reduces active power down standby leakage current in a memory device. During memory's active power down state, the leak current may...
US-7,872,920 Word line drivers in non-volatile memory device and method having a shared power bank and processor-based...
A word line driver system that utilizes a voltage selection circuit to supply one of several voltages to an output node coupled to a plurality of word line...
US-7,872,912 M+N bit programming and M+L bit read for M bit memory cells
A memory device and programming and/or reading process is described that programs and/or reads the cells in the memory array with higher threshold voltage...
US-7,872,911 Non-volatile multilevel memory cells with data read of reference cells
Embodiments of the present disclosure provide methods, devices, modules, and systems for non-volatile multilevel memory cell data retrieval with data read of...
US-7,872,682 Eclipse elimination by monitoring the pixel signal level
An anti-eclipse circuit for an imaging sensor monitors the photo signal level output by a pixel to determine whether the photo signal corresponds to the pixel...
US-7,872,676 Methods, systems, and devices for offset compensation in CMOC imagers
Methods, devices, and systems for offset compensation in an amplifier are disclosed, wherein the amplifier inputs may be exposed to large loads from an array of...
US-7,872,507 Delay lines, methods for delaying a signal, and delay lock loops
Locked loops, delay lines and methods for delaying signals are disclosed, such as a delay line and delay lock loop using the delay line includes a series of...
US-7,872,332 Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and...
Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system...
US-7,872,291 Enhanced atomic layer deposition
A method of enhanced atomic layer deposition is described. In an embodiment, the enhancement is the use of plasma. Plasma begins prior to flowing a second...
US-7,872,284 Pixel with strained silicon layer for improving carrier mobility and blue response in imagers
An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag,...
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