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Patent # Description
US-7,834,347 Organic transistor having a non-planar semiconductor-insulating layer interface
Organic transistors having a nonplanar interface between the insulating layer and the semiconductor layer are provided, along with methods for manufacturing.
US-7,834,342 Phase change material and methods of forming the phase change material
A phase change material including a high adhesion phase change material formed on a dielectric material and a low adhesion phase change material formed on the...
US-7,833,922 Method of forming aluminum oxynitride material and bodies formed by such methods
Methods of forming aluminum oxynitride (AlON) materials include sintering green bodies comprising aluminum orthophosphate or another sacrificial material...
US-7,833,918 Water-activated, disposable two-sided cleaning article
A substantially dry, water-activated cleaning article is described that comprises a two-layer nonwoven substrate impregnated with a cleaning composition...
US-7,833,914 Capacitors and methods with praseodymium oxide insulators
Methods of forming and the resulting capacitors formed by these methods are shown. Monolayers that contain praseodymium are deposited onto a substrate and...
US-7,833,894 Devices and systems having at least one dam structure
A method for forming through-wafer interconnects (TWI) in a substrate. Blind holes are formed from a surface, sidewalls thereof are passivated and coated with a...
US-7,833,892 Method of forming a field effect transistor
The invention includes methods of forming integrated circuitry, methods of forming memory circuitry, and methods of forming field effect transistors. In one...
US-7,833,881 Methods for fabricating semiconductor components and packaged semiconductor components
Packaged semiconductor components and methods for manufacturing packaged semiconductor components. In one embodiment a semiconductor component comprises a die...
US-7,833,860 Recessed gate dielectric antifuse
A recessed dielectric antifuse device includes a substrate and laterally spaced source and drain regions formed in the substrate. A recess is formed between the...
US-7,833,832 Method of fabricating semiconductor components with through interconnects
A method for fabricating a semiconductor component with through interconnects can include the steps of providing a semiconductor substrate with substrate...
US-7,833,819 Method and apparatus for decreasing storage node parasitic charge in active pixel image sensors
Methods, systems and apparatuses for an imager that improve the quality of a captured image. The imager includes a pixel having a photosensor that generates...
US-7,833,601 Methods for releasably attaching support members to microfeature workpieces and microfeature assemblies formed...
Methods for releasably attaching support members to microfeature workpieces and microfeature assemblies formed using such methods are disclosed herein. A method...
US-7,833,456 Systems and methods for compressing an encapsulant adjacent a semiconductor workpiece
Systems and methods for compressing an encapsulant adjacent a semiconductor workpiece are disclosed. A method in accordance with one aspect includes placing a...
US-7,833,427 Electron beam etching device and method
Methods and devices for selective etching in a semiconductor process are shown. Chemical species generated in a reaction chamber provide both a selective etching...
US-7,833,357 Methods for removing contaminant matter from a porous material
Methods of removing contaminant matter from porous materials include applying a polymer material to a contaminated surface, irradiating the contaminated surface...
US-7,833,182 Back support apparatus and method
A device to support the human back/spine and provide assistance in bending, lifting and standing upright comprises a strap and belt system for attachment to the...
US-7,832,690 Telescoping wing locking system
Disclosed is a telescoping wing locking system for use in aircraft having wings that collapse and expand in a telescoping fashion, such as aircraft designed for...
US-7,832,659 Riser assembly for use with fluid sprinkler
The invention is riser assembly for use with a fluid dispenser particularly a sprinkler. The assembly includes: (1) a container partially circumscribing a...
US-7,832,395 Portable oxygen delivery apparatus
A portable breathable gas delivery device including a pressure vessel for storing the breathable gas under pressure and a valve coupled to the pressure vessel...
US-D627,390 Printer
US-D627,370 Air compressor with conical extension
US-D627,184 Bedroll
US-7,831,870 JTAG controlled self-repair after packaging
An integrated circuit containing memory includes IEEE 1149.1 (JTAG) controlled self-repair system that permits permanent repair of the memory after the...
US-7,831,850 Hybrid operating systems for battery powered computing systems
Systems, methods, and/or techniques ("tools") for hybrid operating systems for battery powered computing systems are described herein. The hybrid operating...
US-7,831,785 Data collection management system and method
A data collection management system comprises collection logic configured to store incoming data in a memory at a collection rate, and memory management logic...
US-7,831,768 Method and apparatus for writing data to a disk array
A method for writing data to a RAID 5 configuration of hard disks writes two or more items of data to a data stripe together. The method includes the determining...
US-7,831,765 Distributed programmable priority encoder capable of finding the longest match in a single operation
A distributed, hierarchically-structured, programmable priority encoder for a content addressable memory (CAM) device including at least one section, the section...
US-7,831,205 Methods and systems for wireless communication by magnetic induction
Disclosed are embodiments of methods and systems for wireless data transmission by magnetic induction. In one embodiment, a network of magnetic induction units...
US-7,830,874 Versatile radio packeting for automatic meter reading systems
Methods and systems of providing positive outage notification are described. In some examples, the system determines there is an outage at a facility and...
US-7,830,733 Devices, systems, and methods for independent output drive strengths
Methods, apparatuses and systems are disclosed for independently configurable data and strobe drivers within a memory device. A memory device may include at...
US-7,830,729 Digital filters with memory
A memory device that, in certain embodiments, includes a memory element coupled to a bit-line and a quantizing circuit coupled to the memory element via the...
US-7,830,718 Mitigation of data corruption from back pattern and program disturb in a non-volatile memory device
In one of the disclosed embodiments, a write algorithm is used to remove errors due to back pattern effects, cell-to-cell capacitive coupling, and program...
US-7,830,560 System and method for adaptive digital ramp current control
An adaptive digital ramp current control system comprises a digital current ramp controller configured to digitally ramp a current level supplied to at least one...
US-7,830,437 High fill factor multi-way shared pixel
A pixel cell array architecture having a multiple pixel cells with shared pixel cell components. The individual pixel cell architecture increases the fill factor...
US-7,830,426 Method and apparatus providing color interpolation in color filter arrays using edge detection and correction terms
A method and apparatus for color plane interpolation are provided which interpolates the color values of pixels differently depending on an edge direction and...
US-7,830,412 Method and apparatus for shielding correction pixels from spurious charges in an imager
A barrier for isolating the dark correction pixels from spurious charges within an image sensor. The barrier comprises a charge absorbing region in a substrate...
US-7,830,221 Coupling cancellation scheme
Methods and apparatus are disclosed, such as those involving an interconnection layout for an integrated circuit (IC). One such layout includes a plurality of...
US-7,830,194 Centralizing the lock point of a synchronous circuit
A system and method to establish the lock point of a digital synchronous circuit (e.g., a DLL) at the center of or close to the center of its delay line is...
US-7,830,018 Partitioned through-layer via and associated systems and methods
Partitioned vias, interconnects, and substrates that include such vias and interconnects are disclosed herein. In one embodiment, a substrate has a ...
US-7,830,016 Seed layer for reduced resistance tungsten film
Briefly, a memory device comprising a beta phase tungsten seed layer is disclosed.
US-7,829,991 Stackable ceramic FBGA for high thermal applications
An apparatus package for high-temperature thermal applications for ball grid array semiconductor devices and a method of packaging ball grid array semiconductor...
US-7,829,979 High permeability layered films to reduce noise in high speed interconnects
An apparatus provides a memory having a transmission line circuit with an associated high permeability material. The high permeability material may include a...
US-7,829,976 Microelectronic devices and methods for forming interconnects in microelectronic devices
Microelectronic devices, methods for packaging microelectronic devices, and methods for forming interconnects in microelectronic devices are disclosed herein. In...
US-7,829,969 Storage pixel
Embodiments of the present invention provide pixel cells with increased storage capacity, which are capable of anti-blooming operations. In an exemplary...
US-7,829,938 High density NAND non-volatile memory device
Non-volatile memory devices and arrays are described that utilize dual gate (or back-side gate) non-volatile memory cells with band engineered gate-stacks that...
US-7,829,922 Pixel with transfer gate with no isolation edge
A pixel and imager device, and method of forming the same, where the pixel has a transfer transistor gate associated with a photoconversion device and is...
US-7,829,921 Optimized transistor for imager device
An imager device that has mitigated dark current leakage and punch-through protection. The transistor associated with the photoconversion device is formed with a...
US-7,829,832 Method for operating a pixel cell using multiple pulses to a transistor transfer gate
Methods for operating a pixel cell include efficient transferring of photo-charges using multiple pulses to a transistor transfer gate during a charge...
US-7,829,410 Methods of forming capacitors, and methods of forming DRAM arrays
Some embodiments include methods of forming capacitors. A first section of a capacitor may be formed to include a first storage node, a first dielectric...
US-7,829,399 Capacitorless DRAM on bulk silicon
A method of forming capacitorless DRAM over localized silicon-on-insulator comprises the following steps: A silicon substrate is provided, and an array of...
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