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Patent # Description
US-9,589,962 Array of conductive vias, methods of forming a memory array, and methods of forming conductive vias
A method of forming conductive vias comprises forming at least three parallel line constructions elevationally over a substrate. The line constructions...
US-9,589,933 Methods of processing wafer-level assemblies to reduce warpage, and related assemblies
Wafer-level methods of processing semiconductor devices may involve forming grooves partially through a molding material, the molding material located in...
US-9,589,918 Memory device structure
A memory device structure includes circuitry formed over a substrate and at least one insulating portion formed over said circuitry, each of which includes a...
US-9,589,659 Pre-compensation of memory threshold voltage
Methods of operating a memory include storing a first target data state of multiple possible data states of a first memory cell to be programmed in a target...
US-9,589,644 Reducing programming disturbance in memory devices
Apparatus and methods are disclosed, such as a method that includes precharging channel material of a string of memory cells in an unselected sub-block of a...
US-9,589,634 Techniques to mitigate bias drift for a memory device
Examples may include techniques to mitigate bias drift for memory cells of a memory device. A first memory cell coupled with a first word-line and a bit-line is...
US-9,589,618 Unidirectional spin torque transfer magnetic memory cell structure
Spin torque transfer magnetic random access memory devices configured to be programmed unidirectionally and methods of programming such devices. The devices...
US-9,589,607 Apparatuses and methods for performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
US-9,589,602 Comparison operations in memory
The present disclosure includes apparatuses and methods related to performing comparison operations in memory. An example apparatus can include a first group of...
US-9,589,413 System for tracking a player of gaming devices
A system for tracking a player of gambling game devices has been developed. The system includes a gambling game that accepts a wager from a player and generates...
US-9,589,354 Virtual model viewing methods and apparatus
Virtual model viewing methods and apparatus are described. According to one aspect, a virtual model viewing method includes using a user device, accessing model...
US-9,588,697 Host controller
The present disclosure includes methods, devices, and systems for controlling a memory device. One method for controlling a memory device embodiment includes...
US-9,587,689 All terrain vehicle
An all-terrain vehicle including a frame having longitudinally-spaced ends defining a first longitudinal axis, and an engine supported by the frame. The engine...
US-9,585,763 Intervertebral implant, insertion tool and method of inserting same
An intervertebral implant, alone and in combination with an insertion tool for inserting same and a method for inserting same. The implant has upper and lower...
US-D780,875 Buffer tube
US-D780,539 Bagel knife
US-9,585,206 Multi-junction solid state transducer devices for direct AC power and associated systems and methods
Multi-junction solid-state transducer (SST) devices and associated systems and methods are disclosed herein. In several embodiments, for example, an SST system...
US-9,584,406 Data path switching
A method for selecting a data path includes identifying a plurality of available data paths between a router device and a wide area network. Path selection data...
US-9,584,140 Apparatuses, methods, and circuits including a delay circuit
Apparatuses, methods, and delay circuits for delaying signals are described. An example apparatus includes a fine delay circuit configured to provide an output...
US-9,583,703 Tunable variable resistance memory device
A variable resistance memory device may include a first electrode and a second electrode. The device may further include a chalcogenide glass layer between the...
US-9,583,699 Tunable variable resistance memory device
A variable resistance memory device may include a first electrode and a second electrode. The device may further include a chalcogenide glass layer between the...
US-9,583,525 Die stacked image sensors and related methods
An image sensor. Implementations may include: a first die including a plurality of pixels; a second die including a plurality of transistors, capacitors, or...
US-9,583,476 Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing...
A stackable microelectronic package includes a first microelectronic die attached to and electrically connecting with a first substrate. A second ...
US-9,583,419 Semiconductor constructions having through-substrate interconnects
Some embodiments include methods of forming interconnects through semiconductor substrates. An opening may be formed to extend partway through a semiconductor...
US-9,583,381 Methods for forming semiconductor devices and semiconductor device structures
Methods of forming semiconductor devices and features in semiconductor device structures include conducting an anti-spacer process to remove portions of a first...
US-9,583,334 Gallium lanthanide oxide films
Electronic apparatus and methods of forming the electronic apparatus include a gallium lanthanide oxide film for use in a variety of electronic systems. The...
US-9,583,195 Systems, methods and devices for a memory having a buried select line
Memory cells and methods for programming and erasing a memory cell by utilizing a buried select line are described. A voltage potential may be generated between...
US-9,583,187 Multistage set procedure for phase change memory
Phase change material can be set with a multistage set process. Set control logic can heat a phase change semiconductor material (PM) to a first temperature for...
US-9,583,163 Loop structure for operations in memory
Examples of the present disclosure provide apparatuses and methods related to performing a loop structure for operations performed in memory. An example...
US-9,583,160 Apparatuses including multiple read modes and methods for same
Apparatuses and methods including multiple read modes for reading data from a memory are described. An example apparatus includes a memory including a first...
US-9,583,157 Memory device power managers and methods
Memory devices and methods are described that include a stack of memory dies and an attached logic die. Method and devices described provide for power...
US-9,583,154 Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second...
Generally discussed herein are apparatuses and methods. One such apparatus includes a data line, a first memory cell and a first select transistor. The first...
US-9,582,443 Serial control channel processor for executing time-based instructions
The present disclosure describes a serial control channel processor. In some aspects, a time-based instruction corresponding to a command is executed and a...
US-9,582,362 Setting a default read signal based on error correction
The present disclosure includes apparatuses and methods related to setting a default read signal based on error correction. A number of methods can include...
US-9,582,191 Memory block quality identification in a memory
Methods of operating electronic systems having a memory include reading indications of memory block quality from a plurality of memory blocks of the memory in...
US-9,582,140 Multi-touch object inertia simulation
The inertia system provides a common platform and application-programming interface (API) for applications to extend the input received from various multi-touch...
US-9,581,003 Completing a well in a reservoir
Methods and systems for completing a well including injecting stimulation fluid to stimulate a first interval in the reservoir. The stimulation fluid has a...
US-9,580,852 Pantograph assembly for moveable head sewing machine
A pantograph assembly for a moveable head sewing machine suitable for use quilting fabric which includes a rigid extension arm having a first end and a second...
US-9,579,825 Methods and systems for imaging and cutting semiconductor wafers and other semiconductor workpieces
Methods and systems for imaging and cutting semiconductor wafers and other microelectronic device substrates are disclosed herein. In one embodiment, a system...
US-9,578,952 Convertible backpack and ground cover
A convertible ground cover configured to be able to convert into a backpack and revert to a ground cover. The convertible ground cover and backpack may be...
US-D780,094 Vehicle tire
US-9,578,266 Image sensor defect identification using optical flare
Embodiments described herein may operate to compare an illuminance corresponding to a signal from an image sensor array (ISA) element in a production imaging...
US-9,577,854 Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding
Apparatuses and methods for asymmetric bi-directional signaling incorporating multi-level encoding are disclosed. An example apparatus may include first and...
US-9,577,673 Error correction methods and apparatuses using first and second decoders
Apparatuses and methods for error correcting data are provided. A first error correction code (ECC) decoder is configured to decode a first codeword to provide...
US-9,577,611 Controlling clock input buffers
An integrated circuit may have a clock input pin coupled to a buffer (24). The buffer may supply a clock signal (28) to an integrated circuit chip such as the...
US-9,577,192 Method for forming a metal cap in a semiconductor memory device
Exemplary embodiments of the present invention are directed towards a method for fabricating a semiconductor memory device comprising selectively depositing a...
US-9,577,188 Semiconductor constructions and methods of forming memory cells
Some embodiments include semiconductor constructions having stacks containing electrically conductive material over dielectric material. Programmable material...
US-9,577,186 Non-volatile resistive oxide memory cells and methods of forming non-volatile resistive oxide memory cells
A method of forming a non-volatile resistive oxide memory cell includes forming a first conductive electrode of the memory cell as part of a substrate. The...
US-9,577,168 Solid state lighting device with different illumination parameters at different regions of an emitter array
Solid state lighting (SSL) devices and methods of manufacturing such devices. One embodiment of an SSL device comprises a support and an emitter array having a...
US-9,577,092 Apparatuses having a vertical memory cell
Methods, apparatuses, and systems for providing a body connection to a vertical access device. The vertical access device may include a digit line extending...
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