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Patent # Description
US-9,385,315 Memory cell structures
The present disclosure includes memory cell structures and method of forming the same. One such memory cell includes a first electrode having sidewalls angled...
US-9,385,278 Semiconductor growth substrates and associated systems and methods for die singulation
Semiconductor growth substrates and associated systems and methods for die singulation are disclosed. A representative method for manufacturing semiconductor...
US-9,385,276 Epitaxial devices
Epitaxial growth methods and devices are described that include a textured surface on a substrate. Geometry of the textured surface provides a reduced lattice...
US-9,385,132 Arrays of recessed access devices, methods of forming recessed access gate constructions, and methods of...
A method of forming an array of recessed access device gate constructions includes using the width of an anisotropically etched sidewall spacer in forming mask...
US-9,385,112 Semiconductor devices
A semiconductor device includes a substrate having laterally-adjacent first and second substrate regions. A first isolation region is at least in the first...
US-9,385,045 Methods of forming gated devices
Some embodiments include methods of forming gated devices. An upper region of a semiconductor material is patterned into a plurality of walls that extend...
US-9,384,995 Tungsten salicide gate source for vertical NAND string to control on current and cell pillar fabrication
A non-volatile memory device and a method for forming the non-volatile memory device are disclosed. During fabrication of the memory device, a tungsten salicide...
US-9,384,830 Apparatuses and methods for performing multiple memory operations
The disclosed technology relates to a memory device configured to perform multiple access operations in response to a single command received through a memory...
US-9,384,814 Thyristor memory and methods of operation
Apparatuses and methods can include write schemes for a thyristor memory cell in which an access pulse applied to the gate of the thyristor memory cell is...
US-9,384,801 Threshold voltage expansion
Embodiments including systems, methods, and apparatuses associated with expanding a threshold voltage window of memory cells are described herein. Specifically,...
US-9,384,799 Advanced memory interfaces and methods
Controllers, interfaces, memory devices, methods and systems are disclosed, including a controller configured to interface with a separate memory device and...
US-9,384,785 Multi-channel memory and power supply-driven channel selection
Subject matter disclosed herein relates to a memory device, and more particularly to a multi-channel memory device and methods of selecting one or more channels...
US-9,384,134 Persistent memory for processor main memory
Subject matter disclosed herein relates to a system of one or more processors that includes persistent memory.
US-9,384,127 Flash memory architecture with separate storage of overhead and user data
A memory device has a plurality of dedicated data blocks for storing user data and a plurality of dedicated overhead blocks for storing overhead data. A...
US-9,383,341 Sonic lumber tester
The present invention is a wood grading apparatus including a robust "push" solenoid as a hammer means for impacting a lumber specimen under test. A...
US-9,383,165 Lockable holster
A holster having a cavity and an axis defined along a side wall of the holster; a lever having a finger button portion and an engagement portion, wherein the...
US-9,382,679 Portable device for solid pet waste collection and environmentally sound waste disposal
A portable apparatus of component parts aligned and detachable from one another in such a way as to allow for sanitary and ergonomic collection, hands-free...
US-9,381,394 Folding elliptical lift assist system
An elliptical exercise machine, in one embodiment, includes a first assembly pivotally coupled with a second assembly and at least one assist mechanism. The...
US-D760,943 Lamp
US-D760,900 Keeled glenoid
US-D760,637 Aircraft with above-wing mounted engines
US-D760,607 Measuring cup and removable spoons
US-D760,544 Pinball glass
US-9,379,315 Memory cells, methods of fabrication, semiconductor device structures, and memory systems
Magnetic memory cells, methods of fabrication, semiconductor device structures, and memory systems are disclosed. A magnetic cell core includes at least one...
US-9,379,241 Semiconductor device with strained channels
In various method embodiments, a device region in a semiconductor substrate and isolation regions adjacent to the device region are defined. The device region...
US-9,379,199 Semiconductor device including a contact plug with barrier materials
Disclosed herein is a semiconductor device that comprises a plug including an upper portion, a lower portion and a side surface and comprising tungsten, a...
US-9,379,091 Semiconductor die assemblies and semiconductor devices including same
Methods of fabricating multi-die assemblies including a wafer segment having no integrated circuitry thereon and having a plurality of vertically stacked dice...
US-9,379,013 Method for forming a self-aligned contact in a damascene structure used to form a memory device
Exemplary embodiments of the present invention are directed towards a method for fabricating a self-aligned contact under a bitline in a damascene structure for...
US-9,379,005 Three dimensional memory and methods of forming the same
Some embodiments include a memory device and methods of forming the memory device. One such memory device includes a first group of memory cells, each of the...
US-9,378,847 Systems and methods involving managing a problematic memory cell
Subject matter described pertains to managing problematic memory cells in a memory array.
US-9,378,839 Apparatus and methods including source gates
Apparatus and methods are disclosed, such as an apparatus that includes a string of charge storage devices associated with a pillar (e.g., of semiconductor...
US-9,378,823 Programming a memory cell to a voltage to indicate a data value and after a relaxation time programming the...
A memory cell is programmed to at least a first threshold voltage to indicate a particular data value. After waiting for a relaxation time, the memory cell is...
US-9,378,818 Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines
The present disclosure includes methods and apparatuses that include resistive memory. A number of embodiments include a first memory cell coupled to a data...
US-9,378,791 Apparatuses and methods for controlling a clock signal provided to a clock tree
Apparatuses, sense circuits, and methods for controlling a clock signal to a clock tree is described. An example apparatus includes a consecutive write command...
US-9,378,790 Apparatus and method for buffered write commands in a memory
Memories, buffered write command circuits, and methods for executing memory commands in a memory. In some embodiments, read commands that are received after...
US-9,378,783 I/O circuit with phase mixer for slew rate control
An apparatus includes a terminal, a first plurality of driver lines, and a first phase mixer. The driver lines drive the terminal to a first logic state...
US-9,378,774 Interconnection for memory electrodes
Row and/or column electrode lines for a memory device are staggered such that gaps are formed between terminated lines. Vertical interconnection to central...
US-9,378,157 Security memory access method and apparatus
Various embodiments comprise apparatuses and methods to allow access to a memory device by an external device. A method includes receiving, at the memory...
US-9,377,864 Transforming visualized data through visual analytics based on interactivity
A data visualization application transforms visualized data through visual analytics. A detected gesture and associated visualization are processed through a...
US-9,377,384 Rail shear tester apparatus with multiple loading configurations
An apparatus for testing panel products in edgewise shear in which the shear stress is applied in a diagonal direction with a first rotational degree of freedom...
US-9,377,083 Multiple-output transmission
A multiple-output transmission includes a drive motor and one or more stacked layers. Each layer includes one or more output gears, a drive gear, coupled to be...
US-9,376,161 System and apparatus for a linkage guard
System and apparatus for a linkage protector comprising a linkage arm and a shield element. The linkage arm comprises a front mounting portion rotatably coupled...
US-9,375,784 Method of forming sealed refractory joints in metal-containment vessels, and vessels containing sealed joints
An exemplary embodiment of the invention provides a method of preparing a reinforced refractory joint between refractory sections of a vessel used for...
US-9,374,962 Sweet corn hybrid SV9014SB and parents thereof
The invention provides seed and plants of sweet corn hybrid SV9014SB and the parent lines thereof. The invention thus relates to the plants, seeds and tissue...
US-9,374,960 Pea line DLSC709-1058
The invention provides seed and plants of the pea line designated DLSC709-1058. The invention thus relates to the plants, seeds and tissue cultures of pea line...
US-D760,383 Collapsible funnel
US-D760,146 Aircraft light unit
US-D760,052 Pipe carrying device
US-9,374,902 Package including an underfill material in a portion of an area between the package and a substrate or another...
Embodiments include but are not limited to apparatuses and systems including semiconductor packages, e.g. memory packages, having a substrate or a first...
US-9,374,343 Bitwise operations and apparatus in a multi-level system
A system uses multi-level encoding where each symbol of a plurality of symbols represents more than one bit of information in a user data symbol stream for...
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