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Patent # Description
US-9,281,037 Memory device command decoding system and memory device and processor-based system using same
Systems, devices and methods are disclosed. In an embodiment of one such method, a method of decoding received command signals, the method comprises decoding...
US-9,280,456 Mapping between program states and data patterns
The present disclosure includes methods and apparatuses for mapping between program states and data patterns. One method includes mapping a data pattern to a...
US-9,280,329 Methods and systems for detection in a state machine
A device including a data analysis element including a plurality of memory cells. The memory cells analyze at least a portion of a data stream and output a...
US-9,280,229 Touch alphabet and communication system
A touch alphabet and communication system is provided. The communication system uses a predetermined set of touch gestures, such as fingertip touch patterns...
US-9,280,064 Lithographic method and apparatus
A method of projecting a pattern from a patterning device onto a substrate using a projection system, the method including using an optical phase adjustment...
US-9,277,710 Sweet corn hybrid SV1580SC and parents thereof
The invention provides seed and plants of sweet corn hybrid SV1580SC and the parent lines thereof. The invention thus relates to the plants, seeds and tissue...
US-9,277,709 Sweet corn hybrid SV1408SA and parents thereof
The invention provides seed and plants of sweet corn hybrid SV1408SA and the parent lines thereof. The invention thus relates to the plants, seeds and tissue...
US-D751,241 Lamp
US-D751,056 Device
US-9,277,090 System and method of document reproduction
A document reproduction system includes an optical scanning device configured to output an electronic representation of a document comprising both machine...
US-9,277,071 Scanner platen
A scanner is disclosed. The scanner has a platen with at least one edge of the platen uncovered.
US-9,276,940 Data plan activation
A method, implemented by a router device, for guiding a user in establishing access privileges for a data exchanger includes causing the data exchanger to...
US-9,276,568 Reference voltage generator for single-ended communication systems
A reference voltage (V.sub.ref) generator for a single-ended receiver in a communication system is disclosed. The V.sub.ref generator in one example comprises a...
US-9,276,207 Method, system, and device for heating a phase change memory cell
A memory device, comprising: a phase change material; and an electrode configured to heat the phase change material to change a state of the phase change...
US-9,276,134 Field effect transistor constructions and memory arrays
In some embodiments, a transistor includes a stack having a bottom source/drain region, a first insulative material, a conductive gate, a second insulative...
US-9,276,092 Transistors and methods of forming transistors
Some embodiments include a transistor having a drain region and a source region. A conductive gate is between the source and drain regions. First channel...
US-9,276,081 Methods of forming diodes
Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is...
US-9,276,059 Semiconductor device structures including metal oxide structures
Methods of forming metal oxide structures and methods of forming metal oxide patterns on a substrate using a block copolymer system formulated for...
US-9,276,011 Cell pillar structures and integrated flows
Various embodiments comprise apparatuses and methods, such as a memory stack having a continuous cell pillar. In various embodiments, the apparatus includes a...
US-9,276,001 Semiconductor device and method for manufacturing the same
A semiconductor device comprises a substrate, a word line, an insulation material, and an etch stop material. The substrate comprises a pillar that may comprise...
US-9,276,000 Manufacturing process for zero-capacitor random access memory circuits
Embodiments of a manufacturing process flow for producing standalone memory devices that can achieve bit cell sizes on the order of 4F2 or 5F2, and that can be...
US-9,275,909 Methods of fabricating semiconductor structures
Semiconductor structures may include a stack of alternating dielectric materials and control gates, charge storage structures laterally adjacent to the control...
US-9,275,871 Nanostructures having low defect density and methods of forming thereof
A method of forming nanostructure comprises forming self-assembled nucleic acids on at least a portion of a substrate. The method further comprises contacting...
US-9,275,762 Cladding material, tube including such cladding material and methods of forming the same
A multi-layered cladding material including a ceramic matrix composite and a metallic material, and a tube formed from the cladding material. The metallic...
US-9,275,730 Apparatuses and methods of reading memory cells based on response to a test pulse
The disclosed technology generally relates to memory apparatuses and methods of operating the same, and more particularly to memory arrays and methods of...
US-9,275,728 Memory cells, non-volatile memory arrays, methods of operating memory cells, methods of writing to and writing...
In one aspect, a method of operating a memory cell includes using different electrodes to change a programmed state of the memory cell than are used to read the...
US-9,275,708 Row address decoding block for non-volatile memories and methods for decoding pre-decoded address information
Decoding blocks, memories, and methods for decoding pre-decoded address information are disclosed. One such decoding block includes a first latch and voltage...
US-9,275,701 Apparatuses and methods for performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
US-9,275,698 Memory system and method using stacked memory device dice, and system using the memory system
A memory system and method uses stacked memory device dice coupled to each other and to a logic die. The logic die may include a timing correction system that...
US-9,275,692 Memory, memory controllers, and methods for dynamically switching a data masking/data bus inversion input
Examples are described herein of dynamic switching of data masking and data bus inversion functionality of a memory input. Both dynamic switching and a static...
US-9,275,290 Methods and systems for routing in a state machine
A device includes a routing buffer. The routing buffer includes a first port configured to receive a signal relating to an analysis of at least a portion of a...
US-9,274,991 Memory hub architecture having programmable lane widths
A processor-based system includes a processor coupled to a system controller through a processor bus. The system controller is used to couple at least one input...
US-9,274,973 Memory address translation
The present disclosure includes devices, systems, and methods for memory address translation. One or more embodiments include a memory array and a controller...
US-9,274,883 Apparatuses and methods for storing validity masks and operating apparatuses
Apparatuses and methods for storing a validity mask and operating apparatuses are described. A number of methods for operating an apparatus include storing a...
US-9,274,272 Photonic device and methods of formation
A photonic device and methods of formation that provide an area providing reduced optical coupling between a substrate and an inner core of the photonic device...
US-9,273,823 Latchable clamp hanger
A latchable, clamping hanger for hanging an exercise mat from an external support. The hanger has a clip with a jaw which can be opened by a user pressing with...
US-9,272,913 Methods for producing silicon carbide fibers
Methods of producing silicon carbide fibers. The method comprises reacting a continuous carbon fiber material and a silicon-containing gas in a reaction chamber...
US-9,272,432 Apparatus and method for clamping and cutting compressible materials
An apparatus for cutting expanded fibrous and soft foam materials has a linear clamping feature with an integrated blade guide, suspended in a position to allow...
US-9,271,489 Carbonate ester tuber treatment composition
A carbonate ester composition containing at least one carbonate ester, preferably an alkylene carbonate, and a sprout inhibitor. A tuber having, on at least a...
US-9,271,403 Semiconductor assemblies with multi-level substrates and associated methods of manufacturing
Various embodiments of semiconductor assemblies with multi-level substrates and associated methods of manufacturing are described below. In one embodiment, a...
US-9,270,571 Router collaboration
A router system is disclosed. The router system comprises a wireless router and a cradle comprising a router interface configured to receive the router. One or...
US-9,270,506 Methods for bypassing faulty connections
Apparatus are disclosed, such as those involving a 3-D integrated circuit. One such apparatus includes a first die including a plurality of vertical connectors...
US-9,269,900 Methods of depositing phase change materials and methods of forming memory
A method of forming a phase change material which having germanium and tellurium therein includes depositing a germanium-containing material over a substrate....
US-9,269,899 Electronic device, memory cell, and method of flowing electric current
An electronic device includes two conductive electrodes. A first current path extends from one of the electrodes to the other and has a dominant thermally...
US-9,269,888 Memory cells, methods of fabrication, and semiconductor devices
A magnetic cell includes a magnetic tunnel junction that comprises magnetic and nonmagnetic materials exhibiting hexagonal crystal structures. The hexagonal...
US-9,269,858 Engineered substrates for semiconductor devices and associated systems and methods
Engineered substrates for semiconductor devices are disclosed herein. A device in accordance with a particular embodiment includes a transducer structure having...
US-9,269,795 Circuit structures, memory circuitry, and methods
A circuit structure includes a substrate having an array region and a peripheral region. The substrate in the array and peripheral regions includes insulator...
US-9,269,770 Integrated circuit system with double doped drain transistor
An integrated circuit system includes a substrate, forming a gate over the substrate, forming a first drift region having a first counter diffused region and a...
US-9,269,747 Self-aligned interconnection for integrated circuits
Methods and structures provide horizontal conductive lines of fine pitch and self-aligned contacts extending from them, where the contacts have at least one...
US-9,269,743 Methods of forming imaging device layers using carrier substrates
An array of color filter elements may be formed over an array of photodiodes in an integrated circuit for an imaging device using a carrier substrate. The...
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