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Patent # Description
US-9,423,960 Methods of operating memory devices within a communication protocol standard timeout requirement
The present disclosure includes methods and devices for logical memory blocks. One method for operating a memory device includes receiving a command to operate...
US-9,422,513 Metal and dielectric compatible sacrificial anti-reflective coating cleaning and removal composition
A liquid removal composition and process for removing sacrificial anti-reflective coating (SARC) material from a substrate having same thereon. The liquid...
US-9,421,485 Keyed system for connection of filter cartridge to filter holder
Embodiments of a key system for filters and their connecting heads, brackets, or other holders are shown. The filter cartridge and its holder each have a keyed...
US-9,421,416 Folding elliptical stabilization system
An elliptical exercise machine, in one aspect of the invention, includes at least one frame member, a rear rotational mechanism associated with the at least one...
US-9,420,884 Overhead storage rack
A storage rack including a platform and a plurality of upright support assemblies configured to mount the platform to one or more support structures located...
US-9,420,202 Compact intensified camera module
A compact viewing device (M) has a receiving sensor assembly (10) with a display (12) that generates a visible output image (14) and an output sensor assembly...
US-9,419,797 System, processing device, computer program and method, to transparently encrypt and store data objects such...
A cryptographic system makes everyday data objects, such as a document or conversation, unreadable to anyone other than the owner or those currently having...
US-9,419,628 Measurement initialization circuitry
Measurement initialization circuitry is described. Propagation of a start signal through a variable delay line may be stopped by either of two stop signals. One...
US-9,419,220 Resistive memory elements, resistive memory cells, and resistive memory devices
A method of forming a resistive memory element comprises forming an oxide material over a first electrode. The oxide material is exposed to a plasma process to...
US-9,419,219 Resistive RAM devices and methods
The present disclosure includes a high density resistive random access memory (RRAM) device, as well as methods of fabricating a high density RRAM device. One...
US-9,419,215 Cross-point memory cells, non-volatile memory arrays, methods of reading a memory cell, methods of programming...
Cross-point memory cells, non-volatile memory arrays, methods of reading a memory cell, methods of programming a memory cell, and methods of writing to and...
US-9,419,212 Barrier film techniques and configurations for phase-change memory elements
Embodiments of the present disclosure describe barrier film techniques and configurations for phase-change memory elements. In an embodiment, an apparatus...
US-9,419,182 Solid-state radiation transducer devices having at least partially transparent buried-contact elements, and...
Solid-state radiation transducer (SSRT) devices having buried contacts that are at least partially transparent and associated systems and methods are disclosed...
US-9,419,056 Resistive memory cell structures and methods
Resistive memory cell structures and methods are described herein. One or more memory cell structures comprise a first resistive memory cell comprising a first...
US-9,418,974 Stacked semiconductor die assemblies with support members and associated systems and methods
Stacked semiconductor die assemblies with support members and associated systems and methods are disclosed herein. In one embodiment, a semiconductor die...
US-9,418,970 Redistribution layers for microfeature workpieces, and associated systems and methods
Redistribution layers for microfeature workpieces, and associated systems and methods are disclosed. One method for processing a microfeature workpiece system...
US-9,418,968 Semiconductor device including semiconductor chips mounted over both surfaces of substrate
A semiconductor chip 10 flip-chip mounted on a first surface 32 of a wiring substrate 30, a semiconductor chip 20 flip-chip mounted on a second surface 33 of...
US-9,418,926 Package-on-package semiconductor assemblies and methods of manufacturing the same
Package-on-package systems for packaging semiconductor devices. In one embodiment, a package-on-package system comprises a first semiconductor package device...
US-9,418,872 Packaged microelectronic components
A microelectronic component package includes a plurality of electrical leads which are coupled to a microelectronic component and which have exposed lengths...
US-9,418,848 Methods of forming patterns with a mask formed utilizing a brush layer
Some embodiments include methods of forming patterns. A first mask is formed over a material. The first mask has features extending therein and defines a first...
US-9,418,735 Memory device with reduced neighbor memory cell disturbance
In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes a memory cell, digit line driver, access line driver, clamping...
US-9,418,734 Multi-function resistance change memory cells and apparatuses including the same
Various embodiments comprise apparatuses including drive circuitry to provide signal pulses of a selected time duration and/or amplitude to a number of memory...
US-9,418,711 Semiconductor memory device having main word lines and sub-word lines
A plurality of memory mats classified into groups selected by bits of a row address, a main word driver for selecting a main word line based on bits of the row...
US-9,418,017 Hot memory block table in a solid state storage device
Solid state storage devices and methods for populating a hot memory block look-up table (HBLT) are disclosed. In one such method, an indication to an accessed...
US-9,417,685 Power management
Methods, and apparatus configured to perform such methods, providing peak power management are useful in mitigating excessive current levels within a multi-die...
US-9,417,517 Photomask having a blind region including periodical clear portions
A photo mask includes a plurality of dark patterns disposed on a transparent substrate, a first region, a shield region, and a second region. The first region...
US-9,417,041 Miniature locator device for use with hunting arrows
A hunting arrow for tracking target animals is disclosed and described. The arrow can include a chamber. The arrow may also include a transmitter housing that...
US-9,415,871 Aircraft adapted for transporting cargo
The fuselage of an aircraft comprises a floor structure, a roof structure, a first lateral side structure, a second lateral side structure, and a middle...
US-D764,009 Stun gun
US-D763,643 Wrenching device
US-D763,567 Hunting pack
US-9,413,924 Image forming apparatus for transmitting a job to a destination by matching the job with a delivery agent that...
In one embodiment, a processor-readable medium stores code representing instructions that when executed by a processor cause the processor to receive a selected...
US-9,413,920 Scanner
A scanner is disclosed. The scanner captures three exposures for each color scan line. The scanner has a first, second and third light source that each produces...
US-9,413,620 Associating a data collector with a network account
A system (100) for associating a data collector (FIG. 2, 340-2) with a network account comprises a first computing device (FIG. 1, 115) to collect data...
US-9,413,535 Critical security parameter generation and exchange system and method for smart-card memory modules
A storage device contains a smart-card device and a memory device, which is connected to a controller. The storage device may be used in the same manner as a...
US-9,413,338 Apparatuses, methods, and circuits including a duty cycle adjustment circuit
Apparatuses, methods, and duty cycle correction circuits are described. An example apparatus includes a duty cycle correction (DCC) adjustment circuit...
US-9,412,941 Phase change memory cell with self-aligned vertical heater and low resistivity interface
A low resistivity interface material is provided between a self-aligned vertical heater element and a contact region of a selection device. A phase change...
US-9,412,936 Memory cells, methods of forming memory cells and methods of forming memory arrays
Some embodiments include memory cells which have multiple programmable material structures between a pair of electrodes. One of the programmable material...
US-9,412,821 Stacked thin channels for boost and leakage improvement
A hollow-channel memory device comprises a source layer, a first hollow-channel pillar structure formed on the source layer, and a second hollow-channel pillar...
US-9,412,779 Method, apparatus and system providing a storage gate pixel with high dynamic range
A method, apparatus and system are described providing a high dynamic range pixel. An integration period has multiple sub-integration periods during which...
US-9,412,706 Engineered carrier wafers
Apparatuses and methods for reducing the warp of semiconductor wafer stacks during manufacturing are disclosed. An engineered carrier wafer is disclosed. The...
US-9,412,677 Computer systems having an interposer including a flexible material
Various embodiments of an interposer for mounting a semiconductor die, as well as methods for forming the interposer, are disclosed. The interposer includes...
US-9,412,675 Interconnect structure with improved conductive properties and associated systems and methods
Interconnect structures with improved conductive properties are disclosed herein. In one embodiment, an interconnect structure can include a first conductive...
US-9,412,594 Integrated circuit fabrication
A method for defining patterns in an integrated circuit comprises defining a plurality of features in a first photoresist layer using photolithography over a...
US-9,412,591 Process of semiconductor fabrication with mask overlay on pitch multiplied features and associated structures
Spacers are formed by pitch multiplication and a layer of negative photoresist is deposited on and over the spacers to form additional mask features. The...
US-9,412,472 Determining soft data from a hard read
Apparatuses and methods involving the determination of soft data from hard reads are provided. One example method can include determining, using a hard read, a...
US-9,412,451 Apparatuses and methods using dummy cells programmed to different states
Apparatuses and methods for reducing capacitive loading are described. An example apparatus may include a plurality of memory subblocks of a memory block. A...
US-9,412,433 Counter based design for temperature controlled refresh
A DRAM includes: a temperature sensor for monitoring a temperature operating condition of the DRAM; and a binary counter coupled to the temperature sensor, for...
US-9,412,421 Memory arrays
Some embodiments include memory arrays. The memory arrays can have global bitlines extending along a first horizontal direction, vertical local bitlines...
US-9,411,874 Simplified interaction with complex database
A computer-implemented method for processing data in a database using a data cube is discussed and involves interacting with a user of a computing device, using...
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