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Patent # Description
US-9,214,776 Light bulb socket having a plurality of thread locks to engage a light bulb
A threadless light socket assembly allows a light bulb to be changed by pushing or pulling the light bulb into or out of the socket provides an outer insulator...
US-9,214,713 Method of fabricating a microstrip line dielectric overlay
A printed circuit board has a dielectric constant different from the dielectric constant of free space, with at least two microstrip lines routed adjacent to...
US-9,214,627 Memory cell arrays
Some embodiments include memory cells. The memory cells may have a first electrode, and a trench-shaped programmable material structure over the first...
US-9,214,527 Methods of forming diodes
Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is...
US-9,214,449 Reconfigurable connections for stacked semiconductor devices
Some embodiments include apparatus, systems, and methods comprising semiconductor dice arranged in a stack, a number of connections configured to provide...
US-9,214,394 CMOS fabrication
A method of manufacturing a memory device includes an nMOS region and a pMOS region in a substrate. A first gate is defined within the nMOS region, and a second...
US-9,214,391 Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces formed using...
Methods for forming interconnects in microelectronic workpieces and microelectronic workpieces having such interconnects are disclosed herein. One aspect of the...
US-9,214,389 Methods of forming memory arrays
Some embodiments include methods of forming memory arrays. An assembly is formed which has an upper level over a lower level. The lower level includes...
US-9,214,386 Semiconductor constructions and methods of forming electrically conductive contacts
Some embodiments include methods of forming electrically conductive contacts. An opening is formed through an insulative material to a conductive structure. A...
US-9,214,359 Method and apparatus for simultaneously removing multiple conductive materials from microelectronic substrates
A method and apparatus for simultaneously removing conductive materials from a microelectronic substrate. A method in accordance with one embodiment of the...
US-9,214,232 Methods and apparatuses for calibrating data sampling points
Methods and apparatuses for calibrating data sampling points are disclosed herein. An example apparatus may include a memory that may be configured to receive a...
US-9,213,934 Real time explosive hazard information sensing, processing, and communication for autonomous operation
Methods, computer readable media, and apparatuses provide robotic explosive hazard detection. A robot intelligence kernel (RIK) includes a dynamic autonomy...
US-9,213,606 Image rescue
An image rescue system includes an application program for communication with a mass storage device, the application program being in communication with an...
US-9,213,603 Controller to manage NAND memories
In various embodiments, a single virtualized error correcting code (ECC) NAND controller executes an ECC algorithm and manages a stack of NAND flash memories....
US-9,213,553 System and method for configuring drivers
Driver systems and methods are provided, such as those that include identifying a process corner of a driver; and configuring the driver based on the identified...
US-9,213,512 Storing and removing device drivers in memory in imaging devices
Imaging devices incorporating memory are described herein. According to various embodiments, device driver information may be stored in the memory. Subsequent...
US-9,213,386 Apparatuses and methods and for providing power responsive to a power loss
Apparatuses and methods for providing power responsive a power loss are disclosed herein. A power chip may comprise a power sensor, a write command control...
US-9,213,239 Methods of forming patterns for semiconductor device structures
Methods of forming a pattern in a semiconductor device structure include deprotecting an outer portion of a first photosensitive resist material, forming a...
US-9,212,814 Bathmats with advanced features
Bathmats can include lights, a power source, and a computer configured to control the illumination of the lights. Several bathmat embodiments include...
US-9,212,788 Compact, thermally-enhanced substrate for lighting applications
A solid state light source module having a compact, thermally enhanced substrate with one or more recessed pockets, is provided. The module includes a solid...
US-9,211,355 Scent warmers having non-incandescent heating and light-emitting devices and related methods
A scent warmer has a base structure including a lower portion and a scented material-holding portion. The lower portion may include at least one sidewall and be...
US-9,211,158 Medical waste disposal system assembly
A novel collection device for collection, storage and disposal of biological products, in conjunction with an improved cleansing method. Disclosed is an...
US-D745,674 Vaginal manipulator
US-D745,285 Latchable clamp hanger
US-D745,283 Combined baby toothbrush and teether
US-9,210,347 Vertical 4-way shared pixel in a single column with internal reset and no row select
A method and apparatus for reducing space and pixel circuit complexity by using a 4-way shared vertically aligned pixels in a same column. The at least four...
US-9,209,904 Optical waveguide with cascaded modulator circuits
A method of operating an optical waveguide for transmitting an optical signal input to the optical waveguide with a first frequency. The optical waveguide...
US-9,209,620 Combination ESD protection circuits and methods
Circuits, integrated circuits, apparatuses, and methods, such as those for protecting circuits against electrostatic discharge events are disclosed. In an...
US-9,209,395 Variable resistance memory with lattice array using enclosing transistors
A variable resistance memory array, programming a variable resistance memory element and methods of forming the array. A variable resistance memory array is...
US-9,209,393 Memory arrays and associated methods of manufacturing
Memory arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a memory array includes an access line extending along a first...
US-9,209,388 Memory cells and methods of forming memory cells
Some embodiments include a memory cell that has an electrode, a switching material over the electrode, a buffer region over the switching material, and an ion...
US-9,209,199 Stacked thin channels for boost and leakage improvement
A hollow-channel memory device comprises a source layer, a first hollow-channel pillar structure formed on the source layer, and a second hollow-channel pillar...
US-9,209,194 Semiconductor constructions comprising fuse capacitors
Some embodiments include a semiconductor construction having a semiconductor substrate and an interlayer insulating material over the substrate. Memory cells...
US-9,209,187 Methods of forming an array of gated devices
A method of forming an array of gated devices includes forming a plurality of semiconductor material-comprising blocks individually projecting elevationally...
US-9,209,166 Semiconductor assemblies, stacked semiconductor devices, and methods of manufacturing semiconductor assemblies...
Stacked semiconductor devices, semiconductor assemblies, methods of manufacturing stacked semiconductor devices, and methods of manufacturing semiconductor...
US-9,209,158 Pass-through 3D interconnect for microelectronic dies and associated systems and methods
Pass-through 3D interconnects and microelectronic dies and systems of stacked dies that include such interconnects are disclosed herein. In one embodiment, a...
US-9,209,127 Apparatus and method for high density multi-chip structures
Devices and methods are described including a multi-chip assembly. Embodiments of multi-chip assemblies are provided that uses both lateral connection...
US-9,209,047 Method of producing encapsulated IC devices on a wafer
This method of waferscale packaging produces finished integrated circuits (ICs) individually completely encapsulated with environmentally protective packaging...
US-9,209,039 Methods of forming a reversed pattern in a substrate, and related semiconductor device structures
A method of forming a reversed pattern in a substrate. A resist on a substrate is exposed and developed to form a pattern therein, the patterned resist having a...
US-9,209,013 Constructions comprising thermally conductive stacks containing rutile-type titanium oxide
Some embodiments include methods of forming rutile-type titanium oxide. A monolayer of titanium nitride may be formed. The monolayer of titanium nitride may...
US-9,208,901 Memory buffer having accessible information after a program-fail
A memory device, and a method of operating same, utilize a memory buffer associated with a memory array to maintain information to be available subsequent to a...
US-9,208,891 Memory array with power-efficient read architecture
Various embodiments comprise apparatuses and methods including a three-dimensional memory apparatus having upper strings and lower strings. The upper strings...
US-9,208,881 NAND memory array with mismatched cell and bitline pitch
Embodiments of the present disclosure describe methods, apparatus, and system configurations for NAND memory arrays with mismatched cell and bitline pitch....
US-9,208,835 Timing violation handling in a synchronous interface memory
A phase-change memory includes a phase to provide an upper row address from a row address buffer, a phase to combine the upper row address with a lower row...
US-9,208,833 Sequential memory operation without deactivating access line signals
Some embodiments include apparatuses and methods for activating a signal associated with an access line coupled to different groups of memory cells during a...
US-9,208,075 Non-volatile memory device adapted to identify itself as a boot memory
Non-volatile memory devices and methods of their operation are provided. One such non-volatile memory device has an interface and a control circuit. The...
US-9,208,019 Method and apparatus to perform concurrent read and write memory operations
Subject matter disclosed herein relates to read and write processes of a memory device. During a write process to a particular partition in a memory array, a...
US-9,207,733 Data buffer system and power control method
A data buffer system includes a plurality of data buffer modules and a plurality of switching units. The data buffer module is configured for buffering a...
US-9,206,936 Pipe compression clamp
Disclosed herein is a high compression pipe clamp which in one embodiment has an inner housing and an outer housing. The hollow rigid inner housing may have a...
US-9,206,210 Ionic liquids, electrolyte solutions including the ionic liquids, and energy storage devices including the...
An ionic liquid including a phosphazene compound that has a plurality of phosphorus-nitrogen units and at least one pendant group bonded to each phosphorus atom...
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