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Patent # Description
US-9,171,597 Apparatuses and methods for providing strobe signals to memories
Apparatuses and methods for providing strobe signals to memories are described herein. An example apparatus may include a plurality of memories and a memory...
US-9,171,588 Semiconductor device capable of performing a read leveling and a write leveling based on an ambient temperature
Disclosed herein is an apparatus that includes a first semiconductor chip including a first electrode, and a second semiconductor chip including a second...
US-9,171,587 Vertical memory with body connection
An embodiment of an apparatus includes a substrate, a body semiconductor, a vertical memory access line stack over the body semiconductor, and a body connection...
US-9,171,470 Wireless locating and monitoring system
A wireless tracking device including a positioning system for determining a location of the device and a processor connected to the positioning system. The...
US-9,171,239 Processing image data strips in columnar regions
An apparatus and methods for processing image data in which an image pipeline serially processes columnar regions of a multi-row strip of the image data.
US-9,170,898 Apparatus and methods for providing data integrity
The present disclosure includes apparatus (e.g., computing systems, memory systems, controllers, etc.) and methods for providing data integrity. One or more...
US-9,170,877 Resolving trapping sets
Apparatuses and methods for resolving trapping sets are provided. One example method can include attempting to decode a codeword using initial values for...
US-9,170,781 Method and system for generating object code to facilitate predictive memory retrieval
A method and system are described for generating reference tables in object code which specify the addresses of branches, routines called, and data references...
US-9,170,635 Methods, systems, and devices for management of a memory system
Methods, devices, and systems for a memory management system within an electronic device are disclosed, such as those wherein the memory management system is...
US-9,169,042 Energy absorbing container
An embodiment of an energy absorbing container may include a shell formed of a plastic material, one or more energy absorbing components for absorbing energy...
US-9,168,874 Truck storage system
A truck storage system may include a deck configured to span substantially a total width of a truck bed, four support feet, each support foot situated at a...
US-9,167,895 Retractable utility rack
A utility storage rack comprises a wall mount, mountable to a generally vertical wall, and a storage bed, removably and pivotally coupleable to the wall mount....
US-9,167,834 Preparing oil seed for ruminant feed
Compositions of ruminant feed and feed components are disclosed, as well as methods for preparing oil seeds for ruminant feed. Oil seeds may be subjected to...
US-9,167,780 Pea variety SV0969QH
The invention provides seed and plants of the pea line designated SV0969QH. The invention thus relates to the plants, seeds and tissue cultures of pea line...
US-D741,954 Game playing apparatus
US-9,167,437 Gathering data on cellular data communication characteristics
A method for collecting data that can be used to characterize the performance of a wireless communications system is disclosed. The method comprises determining...
US-9,167,326 In-wall multiple-bay loudspeaker system
A modular sound component system can be configured to be located at least partially behind a wall surface, wherein the wall surface is supported by multiple...
US-9,166,625 Circuits, integrated circuits, and methods for interleaved parity computation
Circuits, integrated circuits, and methods are disclosed for interleaved parity computation. In one such example circuit, an interleaved parity computation...
US-9,166,579 Methods and apparatuses for shifting data signals to match command signal delay
Methods and apparatuses for shifting data signals are disclosed herein. An apparatus may comprise a clock generation circuit, a delay path, and a driver. The...
US-9,166,159 Semiconductor constructions and methods of forming memory cells
Some embodiments include semiconductor constructions having stacks containing electrically conductive material over dielectric material. Programmable material...
US-9,166,158 Apparatuses including electrodes having a conductive barrier material and methods of forming same
Apparatuses and methods of manufacture are disclosed for phase change memory cell electrodes having a conductive barrier material. In one example, an apparatus...
US-9,166,156 Memory cells, methods of forming memory cells and methods of forming memory arrays
Some embodiments include memory cells which have multiple programmable material structures between a pair of electrodes. One of the programmable material...
US-9,166,107 Solid state lighting devices with selected thermal expansion and/or surface characteristics, and associated methods
Solid state lighting devices with selected thermal expansion and/or surface characteristics, and associated methods are disclosed. A method in accordance with a...
US-9,165,937 Semiconductor devices including stair step structures, and related methods
Semiconductor devices, such as three-dimensional memory devices, include a memory array including a stack of conductive tiers and a stair step structure. The...
US-9,165,910 Microelectronic die packages with metal leads, including metal leads for stacked die packages, and associated...
Microelectronic die packages, stacked systems of die packages, and methods of manufacturing them are disclosed herein. In one embodiment, a system of stacked...
US-9,165,888 Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and...
Interconnect structures for stacked dies, including penetrating structures for through-silicon vias, and associated systems and methods are disclosed. A system...
US-9,165,688 Apparatuses, systems, devices, and methods of replacing at least partially non-functional portions of memory
Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least...
US-9,165,681 Applying a voltage-delay correction to a non-defective memory block that replaces a defective memory block...
In an embodiment, a defective memory block is replaced with a non-defective memory block, and a voltage-delay correction is applied to the non-defective memory...
US-9,165,666 Charge pump apparatus, a memory integrated circuit and methods of power supply
A power supply, and a method of controlling the power supply, in which more or less power capacity of the power supply is activated depending on the state of a...
US-9,165,664 Sensing operations in a memory device
Methods and apparatus for sensing operations in memory devices are disclosed. In at least one embodiment, a sensing operation to determine negative threshold...
US-9,165,658 Disturb verify for programming memory cells
Apparatuses and methods for disturb verify for programming operations are described. Programming memory cells can include applying a number of programming...
US-9,165,653 Determining sector status in a memory device
The present disclosure includes methods, devices, modules, and systems for operating semiconductor memory. A number of method embodiments include reading data...
US-9,165,627 Spin torque transfer memory cell structures and methods
Spin Torque Transfer (STT) memory cell structures and methods are described herein. One or more STT memory cell structures comprise an annular STT stack...
US-9,164,945 Devices, systems, and methods to synchronize parallel processing of a single data stream
Disclosed are methods and devices, among which is a system that includes one or more pattern-recognition processors, such as in a pattern-recognition cluster....
US-9,164,940 Methods and systems to accomplish variable width data input
Disclosed are methods and systems for variable width data input to a pattern-recognition processor. A variable width data input method may include receiving...
US-9,164,937 Apparatus and method for data bypass for a bi-directional data bus in a hub-based memory sub-system
A memory hub includes first and second link interfaces for coupling to respective data busses, a data path coupled to the first and second link interfaces and...
US-9,164,894 Staggered programming for resistive memories
Subject matter disclosed herein relates to a memory device and method of programming same. In some embodiments, a memory device can be programmed by...
US-9,164,829 Read bias management to reduce read errors for phase change memory
During a read process for a memory device, such as a phase change memory device, a bias condition can be applied to a memory cell to determine the memory cell's...
US-9,164,701 Logical address translation
The present disclosure includes methods for logical address translation, methods for operating memory systems, and memory systems. One such method includes...
US-9,164,698 Memory having internal processors and methods of controlling memory access
Memories having internal processors and methods of data communication within such memories are provided. One such memory may include a fetch unit configured to...
US-9,164,040 Method and apparatus providing analytical device and operating method based on solid state image sensor
An analytical system-on-a-chip can be used as an analytical imaging device, for example, for detecting the presence of a chemical compound. A layer of...
US-9,163,912 Reactive targets
Disclosed herein is a reactive target for shooting sports and competitions. The reactive target having a plurality of target paddles relative to a pivoting...
US-9,163,891 Flash hider for firearm suppressor
A flash hider that suppresses the visible flash signature during the discharge of a firearm, the flash hider may be connected to an end of a firearm suppressor....
US-9,162,935 Compact FT combined with micro-fibrous supported nano-catalyst
A Fischer Tropsch ("FT") unit includes at least one FT reactor tube. The FT reactor tube is configured to convert syngas into one or more hydrocarbon products....
US-9,162,755 Multiple controllable airflow modification devices
An active wing extension includes a body portion substantially parallel to a wing of an aircraft, as if it were an extension of the wing. The body portion is...
US-9,162,110 Monofin, tail and method
A monofin, mermaid tail, and method of applying the tail and monofin. The fin utilizes a core made of flexible, yet resilient material such as plastic and a...
US-D741,041 Portioned frozen product
US-9,161,026 Systems and methods for calibrating an imager
One example discloses a method for calibrating an imager. A plurality of images of a target, each having an associated integration time, are captured at the...
US-9,160,561 High speed ring/bus
A data communication bus and method of operation thereof, including a plurality of nodes connected to a respective plurality of media segments. A typical node...
US-9,160,349 Die location compensation
Embodiments are described that compensate for a difference in a characteristic (e.g., of performance or operation) of a semiconductor device that is a function...
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