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Patent # Description
US-9,312,577 Circuits and methods for determination and control of signal transition rates in electrochemical cells
A charge/discharge input is for respectively supplying charge to, or drawing charge from, an electrochemical cell. A transition modifying circuit is coupled...
US-9,312,481 Memory arrays and methods of forming memory arrays
Some embodiments include memory arrays having a plurality of memory cells vertically between bitlines and wordlines. The memory cells contain phase change...
US-9,312,480 Memory cells
Some embodiments include a memory cell having a data storage region between a pair of conductive structures. The data storage region is configured to support a...
US-9,312,266 Memories with memory arrays extending in opposite directions from a semiconductor and their formation
Memories and their formation are disclosed. One such memory has a first array of first memory cells extending in a first direction from a first surface of a...
US-9,312,023 Devices and methods of programming memory cells
Devices and methods of programming memory cells, both SLC and MLC, such as to reduce charge-storage structure to charge-storage structure coupling, are shown...
US-9,312,022 Memory timing self-calibration
Methods for memory input timing self-calibration, apparatuses for input timing self-calibration, and systems are disclosed. One such method includes...
US-9,312,020 Methods of operating memory devices
Methods of operating a memory device include applying an increasing sense voltage to a plurality of memory cells, wherein memory cells of the plurality of...
US-9,312,007 Memory device and method having charge level assignments selected to minimize signal coupling
A non-volatile memory device programs memory cells in each row in a manner that minimizes the coupling of spurious signals. A control logic unit programs the...
US-9,312,005 Accessing memory cells in parallel in a cross-point array
Methods and structures for accessing memory cells in parallel in a cross-point array include accessing in parallel a first memory cell disposed between a first...
US-9,311,999 Memory sense amplifiers and memory verification methods
Memory sense amplifiers and memory verification methods are described. According to one aspect, a memory sense amplifier includes a first input coupled with a...
US-9,310,552 Methods and apparatus providing thermal isolation of photonic devices
Described embodiments include photonic integrated circuits and systems with photonic devices, including thermal isolation regions for the photonic devices....
US-9,308,357 Cyst extractor
A cyst extractor allows a medical practitioner to retract, aspirate, ligate and amputate a cyst or cystic mass within a patient under regional anaesthesia and...
US-D753,835 Moisturizing finger cover
US-9,306,600 Read threshold calibration for LDPC
Apparatuses and methods for soft read threshold location calibration are provided. One example method can include selecting read threshold sets (RTSs), and...
US-9,306,579 Output driver robust to data dependent noise
Techniques for controlling a driver to reduce data dependent noise, such as simultaneous switching effects and cross-talk effects. A plurality of drivers may...
US-9,306,518 Voltage regulators, amplifiers, memory devices and methods
Circuits, devices and methods are provided, such as an amplifier (e.g., a voltage regulator) that includes a feedback circuit that supplies negative feedback...
US-9,306,165 Replacement materials processes for forming cross point memory
Methods of forming memory cells comprising phase change and/or chalcogenide materials are disclosed. In one aspect, the method includes providing a lower line...
US-9,306,162 Interfacial cap for electrode contacts in memory cell arrays
Exemplary embodiments of the present invention are directed towards a method for fabricated a memory cell comprising depositing a material to form an interface...
US-9,306,159 Phase change memory stack with treated sidewalls
Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements....
US-9,305,938 Methods of fabricating integrated structures, and methods of forming vertically-stacked memory cells
Some embodiments include a method of fabricating integrated structures. A metal-containing material is formed over a stack of alternating first and second...
US-9,305,929 Memory cells
A memory cell includes a select device and a capacitor electrically coupled in series with the select device. The capacitor includes two conductive capacitor...
US-9,305,905 Apparatuses and related methods for staggering power-up of a stack of semiconductor dies
An apparatus including semiconductor dies in a stack. The semiconductor dies are configured to power-up in a staggered manner. Methods for powering up an...
US-9,305,865 Devices, systems and methods for manufacturing through-substrate vias and front-side structures
Methods of manufacturing semiconductor devices and semiconductor devices with through-substrate vias (TSVs). One embodiment of a method of manufacturing a...
US-9,305,861 Method and system for electrically coupling a chip to chip package
A chip and a chip package can transmit information to each other by using a set of converters capable of communicating with each other through the emission and...
US-9,305,844 Method of making a semiconductor device
Some embodiments include a semiconductor device having a stack structure including a plurality of alternating tiers of dielectric material and poly-silicon...
US-9,305,826 Semiconductor substrate for photonic and electronic structures and method of manufacture
A method of forming a substrate with isolation areas suitable for integration of electronic and photonic devices is provided. A common reticle and...
US-9,305,782 Pitch reduction technology using alternating spacer depositions during the formation of a semiconductor device...
A method for patterning a layer increases the density of features formed over an initial patterning layer using a series of self-aligned spacers. A layer to be...
US-9,305,674 Method and device for secure, high-density tritium bonded with carbon
A method and device for producing secure, high-density tritium bonded with carbon. A substrate comprising carbon is provided. A precursor is intercalated...
US-9,305,667 Nuclear fuel alloys or mixtures and method of making thereof
Nuclear fuel alloys or mixtures and methods of making nuclear fuel mixtures are provided. Pseudo-binary actinide-M fuel mixtures form alloys and exhibit:...
US-9,305,660 Page buffer connections and determining pass/fail condition of memories
Apparatus and methods for determining pass/fail condition of memories facilitate array efficiencies. In at least one embodiment, a set of common lines, one for...
US-9,305,659 Dynamic program window determination in a memory device
A memory device has an array of memory cells and a controller coupled to the array of memory cells. The controller is configured to determine a program window...
US-9,305,656 Methods applying a non-zero voltage differential across a memory cell not involved in an access operation
Methods applying a non-zero voltage differential across a memory cell not involved in an access operation can facilitate improved data retention characteristics.
US-9,305,654 Erase and soft program for vertical NAND flash
Methods, and apparatuses to erase and or soft program a block of NAND memory may include performing an erase cycle on a block of NAND memory comprising two or...
US-9,305,625 Apparatuses and methods for unit identification in a master/slave memory stack
Apparatuses and methods including a plurality of memory units are disclosed. An example apparatus includes a plurality of memory units. Each of the plurality of...
US-9,305,609 System and method of command based and current limit controlled memory device power up
Devices and systems for powering up a memory device, for example, are disclosed. One such memory device includes power up circuitry configured to receive an...
US-9,305,606 High-speed wireless serial communication link for a stacked device configuration using near field coupling
A memory module houses stacked memory devices and a memory controller each having a near-field interface coupled to loop antennas to communicate over-the-air...
US-9,304,968 Methods and devices for programming a state machine engine
A state machine engine having a program buffer. The program buffer is configured to receive configuration data via a bus interface for configuring a state...
US-9,304,750 System and method for processor with predictive memory retrieval assist
A system and method are described for a memory management processor which, using a table of reference addresses embedded in the object code, can open the...
US-9,304,543 Master mode and slave mode of computing device
A computing device to couple with a second computing device. The computing device switches between a master mode and a slave mode based on whether the computing...
US-9,304,465 Determining the conductivity of a liquid
In one example, a processor readable medium has instructions thereon that, when executed by a processor, cause a system to detect a change in electrical...
US-9,303,375 Cable based vehicle barrier fence
A vehicle barrier fence for arresting an impacting vehicle of substantial mass within a selected distance of the fence. The fence having, in part: a retaining...
US-9,301,820 Floss dispensing toothpaste cap
A floss dispensing toothpaste cap having a top portion connected to a bottom portion by a hinge region. An enclosure cavity encloses a removable floss spool. A...
US-9,301,632 Zipper assist device and method
A zipper closure device for assisting in the closing of a zipper on a garment. The device has spring operated jaws which close on a zipper pull and grip the...
US-9,301,595 Multi-layered holster to secure an instrument
A device holster may accommodate different sized devices, such as guns, weapons, tools, etc. One example configuration may include a front cover that includes a...
US-9,300,591 Network device
Disclosed is a network communication switch that facilitates reliable communication of high priority traffic over lower priority traffic across all ingress and...
US-9,299,930 Memory cells, integrated devices, and methods of forming memory cells
Some embodiments include integrated devices, such as memory cells. The devices may include chalcogenide material, an electrically conductive material over the...
US-9,299,929 Phase change memory cells including nitrogenated carbon materials, and related methods
A phase change memory cell comprising a first chalcogenide compound on a first electrode, a first nitrogenated carbon material directly on the first...
US-9,299,767 Source-channel interaction in 3D circuit
A multilayer source provides charge carriers to a multitier channel connector. The source includes a metal silicide layer on a substrate and a metal nitride...
US-9,299,747 Electrode configurations to increase electro-thermal isolation of phase-change memory elements and associated...
Embodiments of the present disclosure describe electrode configurations to increase electro-thermal isolation of phase-change memory elements and associated...
US-9,299,742 High-voltage solid-state transducers and associated systems and methods
High-voltage solid-state transducer (SST) devices and associated systems and methods are disclosed herein. An SST device in accordance with a particular...
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