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Patent # Description
US-1,008,5962 Lipidic furan, pyrrole, and thiophene compounds for treatment of cancer, neurological disorders, and fibrotic...
Compounds, methods, and compositions are provided for the treatment of cancer, neurological disorders, and fibrotic disorders. Specifically, the invention...
US-1,008,5552 Adjustable rack apparatus
The present invention relates to an adjustable rack apparatus that increases the storage, protection, accessibility, security, safety, and organization...
US-1,008,5480 Smoking pipe
The present invention is directed to a smoking pipe having an elastic body that defines an air passage. Preferably the elastic body is formed of a heat...
US-D830,028 Barbecue grill scraping device
US-D829,633 Aircraft
US-1,008,5315 Self-identifying solid-state transducer modules and associated systems and methods
Self-identifying solid-state transducer (SST) modules and associated systems and methods are disclosed herein. In several embodiments, for example, an SST...
US-1,008,4974 Ambient infrared detection in solid state sensors
An image sensor device has a first region configured to sense only infrared illumination and a second region configured to not sense visible and infrared...
US-1,008,4487 Apparatuses and methods for erasure-assisted ECC decoding
One example of erasure-assisted error correction code (ECC) decoding can include reading a codeword with a first trim level, reading the codeword with a second...
US-1,008,4130 Resistance variable memory device with nanoparticle electrode and method of fabrication
A chalcogenide-based programmable conductor memory device and method of forming the device, wherein a nanoparticle is provided between an electrode and a...
US-1,008,4129 Method and apparatus providing multi-planed array memory device
A three-dimensional variable resistance memory array and method of forming the same. The memory array has memory cells in multiple planes in three dimensions....
US-1,008,4114 Textured optoelectronic devices and associated methods of manufacture
Textured optoelectronic devices and associated methods of manufacture are disclosed herein. In several embodiments, a method of manufacturing a solid state...
US-1,008,4084 Ferroelectric field effect transistors, pluralities of ferroelectric field effect transistors arrayed in row...
A ferroelectric field effect transistor comprises a semiconductive channel comprising opposing sidewalls and an elevationally outermost top. A source/drain...
US-1,008,4016 Cross-point memory and methods for fabrication of same
A method of fabricating a memory device is disclosed. In one aspect, the method comprises patterning a first conductive line extending in a first direction. The...
US-1,008,3984 Integrated structures and methods of forming integrated structures
Some embodiments include an integrated structure having a first opening extending through a stack of alternating insulative levels and conductive levels. A...
US-1,008,3981 Memory arrays, and methods of forming memory arrays
Some embodiments include a memory array which has a vertical stack of alternating insulative levels and wordline levels. The wordline levels have terminal ends...
US-1,008,3973 Apparatuses and methods for reading memory cells
Apparatuses and methods for reading memory cells are described. An example method includes sharing a first voltage to increase a voltage of a first sense line...
US-1,008,3941 Stacked semiconductor dies with selective capillary under fill
Stacked semiconductor dies are provided with selective capillary under fill to avoid wafer warpage during curing. In one embodiment, a method of manufacturing a...
US-1,008,3937 Semiconductor devices and packages and methods of forming semiconductor device packages
Semiconductor device packages include first and second semiconductor dice in a facing relationship. At least one group of solder bumps is substantially along a...
US-1,008,3931 Packaged microelectronic devices having stacked interconnect elements and methods for manufacturing the same
Microelectronic devices and method of forming a plurality of microelectronic devices on a semiconductor workpiece are disclosed herein. One such method includes...
US-1,008,3751 Data state synchronization
The present disclosure includes apparatuses, and methods for data state synchronization. An example apparatus includes performing a write operation to store a...
US-1,008,3745 Apparatuses, devices and methods for sensing a snapback event in a circuit
Example subject matter disclosed herein relates to apparatuses and/or devices, and/or various methods for use therein, in which an application of an electric...
US-1,008,3744 Memory device with reduced neighbor memory cell disturbance
In one embodiment, an apparatus, such as a memory device, is disclosed. The apparatus includes a memory cell, digit line driver, access line driver, clamping...
US-1,008,3734 Memory arrays
Some embodiments include an assembly having active material structures arranged in an array having rows and columns. Each of the active material structures has...
US-1,008,3733 Ferroelectric memory cell apparatuses and methods of operating ferroelectric memory cells
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. Prior to writing a logic value to a ferroelectric memory cell, a...
US-1,008,3732 Memory cell imprint avoidance
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A cell may be written with a value that is intended to convey a...
US-1,008,3731 Memory cell sensing with storage component isolation
Methods, systems, and devices for operating a ferroelectric memory cell or cells are described. A ferroelectric memory cell may be selected using a selection...
US-1,008,3727 Apparatuses and methods for concurrently accessing different memory planes of a memory
Apparatuses and methods for performing concurrent memory access operations for different memory planes are disclosed herein. An example apparatus may include a...
US-1,008,3725 Asynchronous/synchronous interface
The present disclosure includes methods, and circuits, for operating a memory device. One method embodiment for operating a memory device includes controlling...
US-1,008,3723 Apparatuses and methods for sharing transmission vias for memory devices
Apparatuses and methods for transmitting die state information between a plurality of dies are described. An example apparatus includes: a plurality of dies,...
US-1,008,3265 Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing...
Apparatuses and methods for measuring an electrical characteristic of a model signal line and providing measurement information based at least in part on the...
US-1,008,3122 Transactional memory
Subject matter disclosed herein relates to techniques to perform transactions using a memory device.
US-1,008,3119 Memory having a static cache and a dynamic cache
The present disclosure includes memory having a static cache and a dynamic cache. A number of embodiments include a memory, wherein the memory includes a first...
US-1,008,3078 Method and apparatus for a volume management system in a non-volatile memory device
Embodiments for partitioning a non-volatile memory device is described. In one embodiment a memory system includes a first addressable range of memory blocks...
US-1,008,2976 Method and apparatus for configuring write performance for electrically writable memory devices
Methods and systems are provided that may include a nonvolatile memory to store information, where the nonvolatile memory is associated with a configuration...
US-1,008,2975 Obfuscation-enhanced memory encryption
The present disclosure includes apparatuses and methods for obfuscation-enhanced memory encryption. An example method comprises performing a write operation,...
US-1,008,2964 Data caching for ferroelectric memory
Methods, systems, and devices for operating a memory device are described. One method includes caching data of a memory cell at a sense amplifier of a row...
US-1,008,2375 Malfunction training device for firearms
A firearm malfunction training device and method include a blank malfunction round that simulates a T3 malfunction and allows a realistic clearing protocol...
US-1,008,1209 Methods and systems for determining a printing position
A method for determining a printing position, such as for image-on-paper registration in a printer or photocopying machine, is disclosed. A fiducial mark...
US-1,008,1129 Additive manufacturing system implementing hardener pre-impregnation
A method is disclosed for additively manufacturing a composite structure. The method may include directing a continuous reinforcement into a print head, and...
US-1,008,0397 Esthetic apparatus and related methods of use
An esthetic apparatus and method for use in the application of cosmetics is disclosed herein. The esthetic apparatus includes an elongate member that can be at...
US-D829,064 Salad cutter
US-1,007,9959 Creating image data for a tile on an image
A data structure includes entries corresponding to a plurality of tiles that form part of an image, where a given entry of the entries includes color...
US-1,007,9340 Phase change memory stack with treated sidewalls
Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements....
US-1,007,9333 Solid-state radiation transducer devices having flip-chip mounted solid-state radiation transducers and...
Solid-state radiation transducer (SSRT) devices and methods of manufacturing and using SSRT devices are disclosed herein. One embodiment of the SSRT device...
US-1,007,9254 Chip scale package and related methods
Implementations of semiconductor packages may include: a die coupled to a glass lid; one or more inner walls having a first material coupled to the die; an...
US-1,007,9246 Apparatuses and methods for forming multiple decks of memory cells
Some embodiments include apparatuses and methods having multiple decks of memory cells and associated control gates. A method includes forming a first deck...
US-1,007,9244 Semiconductor constructions and NAND unit cells
Some embodiments include methods of forming semiconductor constructions. Alternating layers of n-type doped material and p-type doped material may be formed....
US-1,007,9235 Memory cells and memory arrays
Some embodiments include a memory cell having first, second and third transistors, with the second and third transistors being vertically displaced relative to...
US-1,007,9169 Backside stealth dicing through tape followed by front side laser ablation dicing process
A method of forming a plurality of semiconductor devices includes applying a tape material to a back side of a semiconductor device having a silicon layer on...
US-1,007,9065 Reduced voltage nonvolatile flash memory
Systems include a first semiconductor die comprising a charge pump to generate power supply signals, a second semiconductor die comprising a memory array and...
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