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Patent # Description
US-1,003,2903 Threshold voltage adjustment of a transistor
A threshold voltage adjusted long-channel transistor fabricated according to short-channel transistor processes is described. The threshold-adjusted transistor...
US-1,003,2825 Image sensor with a gated storage node linked to transfer gate
A CMOS imaging system with increased charge storage of pixels yet decreased physical size, kTC noise and active area. A storage node is connected to the...
US-1,003,2719 Semiconductor device structures
A method of forming a semiconductor structure comprises forming pools of acidic or basic material in a substrate structure. A resist is formed over the pools of...
US-1,003,2703 Package-on-package semiconductor assemblies and methods of manufacturing the same
Package-on-package systems for packaging semiconductor devices. In one embodiment, a package-on-package system comprises a first semiconductor package device...
US-1,003,2510 Multimodal memristor memory
A multimodal memristor memory provides selectable or reconfigurable operation in a plurality of operational modes of a memristor. The multimodal memristor...
US-1,003,2501 Semiconductor device
A semiconductor device according to an aspect of the present invention has: a plurality of memory cells MC; a plurality of word lines WL each coupled to a...
US-1,003,2496 Variable filter capacitance
Methods, systems, and devices for variable filter capacitance are described. Within a memory device, voltages may be applied to access lines associated with two...
US-1,003,2493 Longest element length determination in memory
Examples of the present disclosure provide apparatuses and methods for determining a length of a longest element in a memory. An example method comprises...
US-1,003,2491 Apparatuses and methods for storing a data value in multiple columns
An example apparatus comprises an array of memory cells coupled to sensing circuitry. The apparatus can include a control component configured to cause...
US-1,003,2162 Multi-purpose data storage key
A secure non-volatile solid state memory data key appears similar to a conventional USB flash drive modified to have a physical shape resembling a door key with...
US-1,003,1879 Memory device for a hierarchical memory architecture
In various embodiments, a hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input...
US-1,003,0445 Tri-truss self-closing gate
Systems and methods of fencing systems are provided that incorporate tri-truss assemblies and/or self-closing gates. A tri-truss assembly may provide stability...
US-1,002,9195 Compartmentally expandable rotating belt filter for energy use reduction
The present technology relates generally to fluid filtration systems. In particular, several embodiments are directed toward compartmentally expandable rotating...
US-1,002,8527 Portable multifunctional smoking utensil holder and kit
A portable multifunctional smoking utensil holder and kit is disclosed that may include a holder for smoking utensils that includes a lower portion; and an...
US-1,002,8463 Sweet corn line SYW-6SSLM804
The invention provides seed and plants of the sweet corn line designated SYW-6SSLM804. The invention thus relates to the plants, seeds and tissue cultures of...
US-1,002,7741 Adaptive communication interface
Embodiments of the invention include a communication interface and protocol for allowing communication between devices, circuits, integrated circuits, and other...
US-1,002,7523 Wireless devices and systems including examples of mixing input data with coefficient data
Examples described herein include systems and methods which include wireless devices and systems with examples of mixing input data with coefficient data. For...
US-1,002,7381 Method and apparatus for inductive coupling signal transmission
Method and Apparatuses for of transmitting data between semiconductor chips are described. An example apparatus includes a first semiconductor chip and a second...
US-1,002,6889 Semiconductor structures and devices and methods of forming semiconductor structures and magnetic memory cells
A magnetic cell includes a magnetic region formed from a precursor magnetic material comprising a diffusive species and at least one other species. An amorphous...
US-1,002,6836 Recessed transistors containing ferroelectric material
Some embodiments include transistor constructions having a first insulative structure lining a recess within a base. A first conductive structure lines an...
US-1,002,6680 Semiconductor package and fabrication method thereof
A semiconductor package includes an interconnect component surrounded by a molding compound. The interconnect component comprises a first RDL structure. A...
US-1,002,6643 Methods of forming nanofluidic channels
Some embodiments include methods of forming voids within semiconductor constructions. In some embodiments the voids may be utilized as microstructures for...
US-1,002,6605 Method of reducing residual contamination in singulated semiconductor die
In one embodiment, semiconductor die are singulated from a semiconductor wafer by placing the semiconductor wafer onto a carrier tape, forming singulation lines...
US-1,002,6480 Memory device including multiple select gates and different bias conditions
Some embodiments include apparatuses and methods using first and second select gates coupled in series between a conductive line and a first memory cell string...
US-1,002,6462 Apparatuses and methods for providing constant DQS-DQ delay in a memory device
Apparatuses and methods for creating a constant DQS-DQ delay in a memory device are described. An example apparatus includes a first adjustable delay line...
US-1,002,6460 Techniques to mitigate bias drift for a memory device
Examples may include techniques to mitigate bias drift for memory cells of a memory device. A first memory cell coupled with a first word-line and a bit-line is...
US-1,002,6459 Data gathering in memory
Examples of the present disclosure provide apparatuses and methods for storing a first element in memory cells coupled to a first sense line and a plurality of...
US-1,002,6458 Memories and methods for performing vector atomic memory operations with mask control and variable data length...
Memories and methods for performing an atomic memory operation are disclosed, including a memory having a memory store, operation logic, and a command decoder....
US-1,002,6457 Device having multiple channels with calibration circuit shared by multiple channels
An apparatus includes a first channel, a second channel and a calibration circuit. The first channel includes a first command control circuit. The second...
US-1,002,5593 Generating and executing a control flow
The present disclosure provide apparatuses and methods related to generating and executing a control flow. An example apparatus can include a first device...
US-1,002,4626 Compressed gas gun
A compressed gas gun having a bolt and piston movable by the application of compressed gas, and a removable inline cylinder, are provided.
US-1,002,4024 Cement form with breakaway portion
A cement form includes a unitary body portion having a first surface arranged vertically and configured to support a volume of cement, a second surface arranged...
US-1,002,4023 Cement form apparatus and method
A cement form includes a first surface arranged vertically and configured to support a volume of cement, a second surface arranged horizontally and configured...
US-1,002,3158 Anti-theft vehicle brake
An anti-theft vehicle brake including a lockable restraining hub coupled to a wheel. The lock's default state being engaged and preventing rotation of the...
US-1,002,1882 Value-added products from small grains, method of making and uses thereof
The present invention relates to methods of producing value added products from small grains, methods of making and uses thereof. In an exemplary embodiment,...
US-1,002,1865 Trolling weight
A trolling weight is designed to sink while minimizing drag. The trolling weight has a forward bulb arranged as a paraboloid configured to reduce the drag while...
US-1,002,0446 Methods of forming magnetic memory cells and semiconductor devices
A magnetic cell includes a free region between an intermediate oxide region (e.g., a tunnel barrier) and a secondary oxide region. Both oxide regions may be...
US-1,002,0432 Etched trenches in bond materials for die singulation, and associated systems and methods
Etched trenches in a bond material for die singulation, and associated systems and methods are disclosed. A method for solid state transducer device singulation...
US-1,002,0360 Integrated memory
Some embodiments include an integrated memory having an array of capacitors. The array has edges. The capacitors along the edges are edge capacitors, and the...
US-1,002,0310 Memory device and fabricating method thereof
A memory device and a method for fabricating the same are provided. The memory device includes a substrate, a first active region, a second active region, a...
US-1,002,0289 Layout of transmission vias for memory device
Apparatuses and methods for supplying power to a plurality of dies are described. An example apparatus includes: a substrate; first, second and third memory...
US-1,002,0287 Pass-through interconnect structure for microelectronic dies and associated systems and methods
Pass-through interconnect structures for microelectronic dies and associated systems and methods are disclosed herein. In one embodiment, a microelectronic die...
US-1,002,0252 Wiring with external terminal
Apparatuses for providing external terminals of a semiconductor device are described. An example apparatus includes: a pad formation area including a plurality...
US-1,002,0228 Integrated circuitry and methods of forming transistors
Some embodiments include integrated circuits having first and second transistors. The first transistor is wider than the second transistor. The first and second...
US-1,002,0058 Memory as a programmable logic device
Methods for operating a memory, and memory configured to perform similar methods, include programming a first series string of memory cells of a first group of...
US-1,002,0056 Methods and apparatuses including a string of memory cells having a first select transistor coupled to a second...
Generally discussed herein are apparatuses and methods. One such apparatus includes a data line, a first memory cell and a first select transistor. The first...
US-1,002,0046 Stack refresh control for memory device
Apparatuses and methods for self-refreshing a plurality of dies are described. An example apparatus includes a first die including a first bank and a second...
US-1,002,0045 Partial access mode for dynamic random access memory
Some embodiments provide a method to reduce the refresh power consumption by effectively extending the memory cell retention time. Conversion from 1 cell/bit to...
US-1,002,0038 Apparatuses and methods for controlling wordlines and sense amplifiers
Apparatuses for controlling defective bit lines in a semiconductor device are described. An example apparatus includes: a first region including a plurality of...
US-1,002,0033 Indirect register access method and system
Systems and methods are provided for managing access to registers. In one embodiment, a system may include a processor and a plurality of registers. The...
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