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Patent # Description
US-9,190,133 Apparatuses and methods for a memory die architecture including an interface memory
Apparatuses and methods for reducing capacitance on a data bus are disclosed herein. In accordance with one or more described embodiments, an apparatus may...
US-9,190,126 Transistor voltage threshold mismatch compensated sense amplifiers and methods for precharging sense amplifiers
Sense amplifiers and methods for precharging are disclosed, including a sense amplifier having a pair of cross-coupled complementary transistor inverters, and a...
US-9,189,585 Pad over interconnect pad structure design
A design rule checker that performs a maximum pattern density check in a first intermediary metallization layer that underlies a top metallization layer and a...
US-9,189,444 Apparatus, electronic devices and methods associated with an operative transition from a first interface to a...
Subject matter disclosed herein relates to an apparatus comprising memory and a controller, such as a controller which determines block locking states in...
US-9,189,440 Data interleaving module
The present disclosure includes apparatuses and methods related to a data interleaving module. A number of methods can include interleaving data received from a...
US-9,189,390 Wear leveling for erasable memories
In accordance with some embodiments, wear leveling may be done based on the difference in age of discarded blocks and engaged blocks. Data is moved to an older...
US-9,189,283 Task launching on hardware resource for client
A system includes a client management component, a monitor component, and a hardware resource component, each of which is implemented in hardware. The client...
US-9,189,096 Multi-touch object inertia simulation
The inertia system provides a common platform and application-programming interface (API) for applications to extend the input received from various multi-touch...
US-9,188,904 Toner supply regulation
An electro-photographic print system or method for regulating a supply of toner based on a required toner amount.
US-9,188,763 Scope zoom lever
A scope zoom lever has a lever having a first lever attachment facility and a second lever attachment facility, an elongated strap having a first end having a...
US-9,188,491 Semiconductor device including a temperature sensor circuit
A semiconductor device including a temperature sensor includes a pull up circuit, a pull down circuit, a first additional current path, and a second additional...
US-9,187,753 Transcriptional control in Alicyclobacillus acidocaldarius and associated genes, proteins, and methods
Isolated and/or purified polypeptides and nucleic acid sequences encoding polypeptides from Alicyclobacillus acidocaldarius are provided. Further provided are...
US-9,187,327 Phosphoric acid production gypsum filtration flocculant pre-dilution (make down) with post-filtration...
A method for minimizing the addition of water to a phosphoric acid production process is described. The method uses phosphoric acid to make down a flocculant...
US-9,187,325 Molten salt rolling bubble column, reactors utilizing same and related methods
Reactors for carrying out a chemical reaction, as well as related components, systems and methods are provided. In accordance with one embodiment, a reactor is...
US-9,187,236 Aerosol system for repairing a patched portion of a surface
A texturing system for applying a desired texture pattern on a patched portion of a surface. The texturing system comprises texture material, a dispensing...
US-9,186,178 Vaginal manipulator head with tissue index and head extender
A vaginal manipulator includes a head, a tissue index, a door, and a head extender. The head has a first end connected to a distal end of a shaft and a distal...
US-D743,269 Growler with lid
US-D743,205 Shot glass
US-9,185,315 Anti-eclipse circuitry with tracking of floating diffusion reset level
An anti-eclipse circuit for an imager is formed from pixel circuitry over the same semiconductor substrate as the imaging pixels. More specifically, two...
US-9,185,174 Maintaining mobile device operations
Systems, methods, and computer program products are provided for synchronizing device settings at a mobile device with settings held at a database in a...
US-9,184,711 Signaling systems, preamplifiers, memory devices and methods
Signaling systems, preamplifiers, memory devices and methods are disclosed, such as a signaling system that includes a transmitter configured to receive a first...
US-9,184,507 Multi-slot common aperture dual polarized omni-directional antenna
Horizontally polarized and dual polarized antennas are described herein. In some examples, a horizontally polarized and dual polarized antenna may be mounted or...
US-9,184,385 Arrays of nonvolatile memory cells and methods of forming arrays of nonvolatile memory cells
An array of nonvolatile memory cells includes a plurality of vertically stacked tiers of nonvolatile memory cells. The tiers individually include a first...
US-9,184,384 Memory cells and methods of forming memory cells
Some embodiments include methods of forming memory cells. An opening is formed over a first conductive structure to expose an upper surface of the first...
US-9,184,377 Resistance variable memory cell structures and methods
Resistance variable memory cell structures and methods are described herein. A number of embodiments include a first resistance variable memory cell comprising...
US-9,184,336 Light emitting devices with built-in chromaticity conversion and methods of manufacturing
Various embodiments of light emitting devices with built-in chromaticity conversion and associated methods of manufacturing are described herein. In one...
US-9,184,191 Method providing an epitaxial photonic device having a reduction in defects and resulting structure
A method of forming a photonic device and resulting structure are described in which the photonic device is epitaxially grown over a substrate surface...
US-9,184,175 Floating gate memory cells in vertical memory
Floating gate memory cells in vertical memory. A control gate is formed between a first tier of dielectric material and a second tier of dielectric material. A...
US-9,184,167 Memory cell support lattice
Memory cell support lattices and methods of forming the same are described herein. As an example, a method of forming a memory cell support lattice includes...
US-9,184,161 Vertical gated access transistor
A method of forming an apparatus includes forming a plurality of deep trenches and a plurality of shallow trenches in a first region of a substrate. At least...
US-9,184,159 Simplified pitch doubling process flow
A method for fabricating a semiconductor device comprises patterning a layer of photoresist material to form a plurality of mandrels. The method further...
US-9,184,105 Semiconductor device packages including thermally insulating materials and methods of making and using such...
Semiconductor devices may include a first semiconductor die comprising a heat-generating region located at a periphery thereof. A second semiconductor die is...
US-9,184,061 Systems and methods for forming zirconium and/or hafnium-containing layers
A method of forming (and apparatus for forming) a zirconium and/or hafnium-containing layer on a substrate, particularly a semiconductor substrate or substrate...
US-9,184,058 Methods of forming patterns by using a brush layer and masks
Some embodiments include methods of forming patterns. A first mask is formed over a material. The first mask has features extending therein and defines a first...
US-9,183,952 Apparatuses and methods for compressing data received over multiple memory accesses
Apparatuses and methods for compressing data responsive to a plurality of memory accesses is described. An example compression circuit includes a comparator...
US-9,183,948 Apparatuses, integrated circuits, and methods for measuring leakage current
Methods, apparatuses, and integrated circuits for measuring leakage current are disclosed. In one such example method, a word line is charged to a first...
US-9,183,941 Thermal treatment of flash memories
A memory controller can provide current to a heater in a flash memory to reduce cycling induced errors. If necessary, after heating, the memory may be...
US-9,183,929 Systems, methods and devices for programming a multilevel resistive memory cell
Embodiments disclosed herein may relate to programming a multi-level memory cell with programming pulse sequences that comprise forward-biased and...
US-9,183,928 Descending set verify for phase change memory
Subject matter disclosed herein relates to a memory device, and more particularly to write performance of a phase change memory.
US-9,183,904 Apparatuses, memories, and methods for facilitating splitting of internal commands using a shared signal path
Apparatuses, memories, and methods for facilitating splitting of internal commands using a shared signal path are described. In an example shared signal path, a...
US-9,183,900 Data paths using a first signal to capture data and a second signal to output data and methods for providing data
Data paths, memories, and methods for providing data from memory are disclosed. An example read data path includes a delay path, and a clocked data register....
US-9,183,567 Collecting information regarding consumer click-through traffic
A method and system for providing the centralized collection of click-through traffic information. The method includes receiving a DNS query for a domain name...
US-9,183,561 Automatic generation of trend charts
Automatic trend analysis is provided on a dataset. Upon selection of a data cell or chart point within a data representation, a trend chart is automatically...
US-9,183,135 Preparation of memory device for access using memory access type indicator signal
Subject matter disclosed herein relates to memory devices or accessing memory devices, and more particularly, but by way of example and not limitation, to...
US-9,183,070 Resting blocks of memory cells in response to the blocks being deemed to fail
In an embodiment, a block of memory cells is rested in response to the block of memory cells being deemed to fail. For some embodiments, a rested block may be...
US-9,183,057 Systems and methods for accessing memory
Methods of mapping memory cells to applications, methods of accessing memory cells, systems, and memory controllers are described. In some embodiments, a memory...
US-9,182,808 Low-power network stacks and driver subsets
The present disclosure describes apparatuses and techniques for low-power alternate firmware. In some aspects, data packets are received from a network...
US-9,182,730 Image forming apparatus
When an opening and closing member is being closed, urging force which a first engaged portion of the opening and closing member receives in a direction...
US-9,182,490 Video and 3D time-of-flight image sensors
Electronic devices may include time-of-flight (ToF) image pixels. Each ToF pixel may include a photodiode, a first capacitor coupled to the photodiode via a...
US-9,182,364 Hot wire needle probe for thermal conductivity detection
An apparatus comprising a needle probe comprising a sheath, a heating element, a temperature sensor, and electrical insulation that allows thermal conductivity...
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