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Patent # Description
US-9,478,497 Single spacer process for multiplying pitch by a factor greater than two and related intermediate IC structures
Single spacer processes for multiplying pitch by a factor greater than two are provided. In one embodiment, n, where n.gtoreq.2, tiers of stacked mandrels are...
US-9,478,426 Semiconductor device and manufacturing method thereof
A number of variations may include a method that may include depositing a first layer on a first semiconductor epi layer (epitaxial layer) in an overlying...
US-9,478,282 State determination in resistance variable memory
An evaluation signal is applied to a memory cell in an array of resistance variable memory cells. The evaluation signal is configured to cause the memory cell...
US-9,478,270 Data paths using a first signal to capture data and a second signal to output data and methods for providing data
Data paths, memories, and methods for providing data from memory are disclosed. An example read data path includes a delay path, and a clocked data register....
US-9,478,262 Semiconductor device including input/output circuit
Disclosed here is an apparatus that comprises a data terminal, a data output circuit including a plurality of output buffers coupled in common to the data...
US-9,477,968 Collecting information regarding consumer click-through traffic
A method and system for providing the centralized collection of click-through traffic information. The method includes receiving a DNS query for a domain name...
US-9,477,863 Systems and methods to determine motion parameters using RFID tags
Systems and methods to determine motion parameters of physical objects using radio frequency identification (RFID) tags attached to the objects. In one...
US-9,477,636 Memory having internal processors and data communication methods in memory
Memory having internal processors, and methods of data communication within such a memory are provided. In one embodiment, an internal processor may...
US-9,477,616 Devices, systems, and methods of reducing chip select
Several systems and methods of chip select are described. In one such method, a device maintains two identifiers, (ID_a and ID_m). When the device receives a...
US-9,477,587 Method and apparatus for a volume management system in a non-volatile memory device
Embodiments for partitioning a non-volatile memory device is described. In one embodiment a memory system includes a first addressable range of memory blocks...
US-9,477,333 Multi-touch manipulation of application objects
The manipulation system described herein provides a common platform and application-programming interface (API) for applications to communicate with various...
US-9,475,660 Palletizer for corrugated bundles
Techniques that palletize bundles at high-speed. A robotic controller includes a vision system that determines a location and orientation of incoming bundles, a...
US-9,473,465 Lingual transformation based encryption
For lingual transformation-based encryption, a method parses a secure message into lingual units. The method further generates a validation nonce from the...
US-9,473,146 Apparatuses and methods for low power counting circuits
Apparatuses and methods for low power counting circuits are described herein. An example apparatus may include a frequency divider configured to receive an...
US-9,472,755 Resistive memory architectures with multiple memory cells per access device
A resistive memory structure, for example, phase change memory structure, includes one access device and two or more resistive memory cells. Each memory cell is...
US-9,472,699 Energy harvesting devices, systems, and related methods
Energy harvesting devices include a substrate and a plurality of resonance elements coupled to the substrate. Each resonance element is configured to collect...
US-9,472,663 N-type field effect transistors, arrays comprising N-type vertically-oriented transistors, methods of forming...
An n-type field effect transistor includes silicon-comprising semiconductor material comprising a pair of source/drain regions having a channel region...
US-9,472,560 Memory cell and an array of memory cells
A memory cell includes a first electrode and a second electrode. A select device and a programmable device are in series with each other between the first and...
US-9,472,542 DRAM arrays, semiconductor constructions and DRAM array layouts
Some embodiments include a DRAM array layout. Wordlines extend along a first direction, and bitlines extend along a second direction that crosses the first...
US-9,472,518 Semiconductor structures including carrier wafers and methods of using such semiconductor structures
A semiconductor structure comprising a carrier wafer and a device wafer. The carrier wafer comprises trenches sized and configured to receive conductive pillars...
US-9,472,461 Double gated 4F2 dram CHC cell and methods of fabricating the same
A semiconductor device is provided that includes a fin having a first gate and a second gate formed on a first sidewall of the fin in a first trench, wherein...
US-9,472,458 Method of reducing residual contamination in singulated semiconductor die
In one embodiment, semiconductor die are singulated from a semiconductor wafer by placing the semiconductor wafer onto a carrier tape, forming singulation lines...
US-9,472,287 Local self-boost using a plurality of cut-off cells on a single side of a string of memory cells
Methods for local self-boost of a selected memory cell channel, memory devices, and systems are disclosed. One such method generates a cut-off channel under...
US-9,472,273 Method and apparatus for decoding memory
A thin-film memory may include a thin-film transistor-free address decoder in conjunction with thin-film memory elements to yield an all-thin-film memory. Such...
US-9,472,265 Apparatuses and methods for performing logical operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
US-9,472,264 Semiconductor memory device having sense amplifier
An apparatus includes a memory cell, a bit line coupled to the memory cell, and a sense amplifier configured to amplify a data signal on the bit line read out...
US-9,472,253 Semiconductor device including spiral data path
A semiconductor device disclosed in this disclosure includes a first terminal formed above a first surface of a semiconductor substrate, a second terminal...
US-9,472,252 Apparatuses and methods for improving retention performance of hierarchical digit lines
Apparatuses and methods for improving retention performance of hierarchical digit lines are disclosed herein. An example apparatus may include a first digit...
US-9,472,244 Apparatus power control
The present disclosure includes apparatuses and methods for apparatus power control. A number of embodiments include determining a power profile for each of a...
US-9,471,425 Data conditioning to improve flash memory reliability
Methods for managing data stored in a memory device facilitate managing utilization of memory of different densities. The methods include reading first data...
US-9,471,290 Utilizing special purpose elements to implement a FSM
Apparatus, systems, and methods for a compiler are described. One such compiler generates machine code corresponding to a set of elements including a general...
US-9,471,087 Apparatuses and methods for providing clock signals
Apparatuses and methods for providing clock signals are described herein. An example apparatus may include a clock generator circuit. The clock generator...
US-9,471,008 Developer container, process cartridge, and image forming apparatus
A contacting portion of a shutter appears in front of a container opening to be at a position where the contacting portion contacts with a sealing member...
US-9,470,616 Pipette instrument
A pipette instrument 100 carrying interrogation circuitry 132 adapted to interrogate a data signal received from a removable instrumented pipette tip 114. The...
US-D769,406 Insert for fishing float or strike indicator
US-D769,068 Beverage container
US-9,467,633 High dynamic range imaging systems having differential photodiode exposures
Image sensors may include an array of photodiodes arranged in groups of adjacent photodiodes that generate charge in response to same-colored light. The image...
US-9,466,795 Memory cells with recessed electrode contacts
Memory cells with recessed electrode contacts and methods of forming the same are provided. An example memory cell can include an electrode contact formed in a...
US-9,466,787 Memory cells, methods of fabrication, semiconductor device structures, memory systems, and electronic systems
A magnetic cell core includes a seed region with a plurality of magnetic regions and a plurality of nonmagnetic regions thereover. The seed region provides a...
US-9,466,660 Semiconductor structures including molybdenum nitride, molybdenum oxynitride or molybdenum-based alloy...
A semiconductor structure may include a first electrode over a substrate, a high-K dielectric material over the first electrode, and a second electrode over the...
US-9,466,531 Apparatuses including stair-step structures and methods of forming the same
Methods for forming semiconductor structures are disclosed, including a method that involves forming sets of conductive material and insulating material,...
US-9,466,504 Methods of fabricating features associated with semiconductor substrates
Some embodiments include a method of fabricating features associated with a semiconductor substrate. A first region of the semiconductor substrate is altered...
US-9,466,380 Semiconductor memory column decoder device and method
Semiconductor memory devices and methods include a flash memory cell array fabricated in a well, with memory cells in the same column connected to each other in...
US-9,466,361 Memory devices
Some embodiments include memory devices having a wordline, a bitline, a memory element selectively configurable in one of three or more different resistive...
US-9,466,348 Method and apparatus for memory command input and control
Memories containing command decoder, chip enable, and signal truncation circuits are disclosed. One such command decoder circuit may include command decoder...
US-9,466,344 System and method for decoding commands based on command signals and operating state
A system and method for decoding command signals that includes a command decoder configured to generate internal control signals to perform an operation based...
US-9,466,340 Apparatuses and methods for performing compare operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing compare and/or report operations using sensing circuitry. An example method can...
US-9,466,337 Apparatuses and method for supply voltage level detection
Example apparatuses and methods may detect when one or more supply voltage levels have reached a trigger voltage. An example apparatus may include a terminal, a...
US-9,465,964 Systems and methods using single antenna for multiple resonant frequency ranges
A radio frequency device utilizing an antenna having a single antenna structure resonant on multiple resonant frequency ranges. The antenna can be configured to...
US-9,465,929 System and method for controlling user access to an electronic device
A method and system for authenticating a user to access a computer system. The method comprises communicating security information to the computer system, and...
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