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Patent # Description
US-1,014,0225 Impedance adjustment in a memory device
Methods include configuring termination devices of a driver circuit of a memory device, storing a first plurality of trim values representative of the...
US-1,014,0222 Interface components
In an example, an apparatus may have a controller to be coupled to a host, an interface component coupled to the controller, and a plurality of memory devices...
US-1,014,0104 Target architecture determination
Examples of the present disclosure provide apparatuses and methods for target architecture determination. An example method comprises receiving an indication of...
US-1,014,0057 Apparatuses and methods for multiple address registers for a solid state device
The present disclosure includes apparatuses, systems, and methods related to multiple address registers for a solid state device (SSD). An example apparatus...
US-1,014,0040 Memory device with dynamic program-verify voltage calibration
A memory system includes a memory array including a plurality of memory cells; and a controller coupled to the memory array, the controller configured to:...
US-1,013,9551 Electronic device with light-generating sources to illuminate an indicium
An apparatus includes a first display, an indicium, and a second display. The second display can include a light-generating source deposited on a substrate. The...
US-1,013,9205 High impact strength nock assembly
A high impact strength nock assembly that couples with, and decouples from, a bushing mounted in an arrow. The forces applied to the nock during launch are...
US-1,013,9184 Weapon security apparatus
A firearm security apparatus may include a base assembly and a locking assembly having a first plate and a second plate. The second plate may be moveable...
US-1,013,8150 Methods and systems for treating vinasse
Systems and methods for treating vinasse are disclosed. The methods treat vinasse to generate useable water. The methods include providing vinasse, reacting the...
US-1,013,7481 Methods of removing particles from over semiconductor substrates
Some embodiments include methods of removing particles from over surfaces of semiconductor substrates. Liquid may be flowed across the surfaces and the...
US-1,013,7164 Dietary supplement compositions
This document provides dietary supplement compositions. For example, dietary supplement compositions having an acetylcholinesterase inhibitor (e.g., huperzine...
US-1,013,6920 Adjustable calcaneal restraint system
Disclosed is an adjustable and partially removable calcaneal restraint system and treatment method in the context of a first phase of surgery wherein a...
US-1,013,6732 Seating apparatus and methods of using the same
In one aspect, seating apparatus are described herein. In some embodiments, a seating apparatus comprises a seating surface, two arms projecting upwardly from...
US-1,013,6694 Protective cover for an article of footwear
A protective cover for an article of footwear can include a first portion covering the top and sides of the footwear and a second portion covering the back of...
US-1,013,6581 Mid-size or big bale stack bed wagon and bale loader arm assembly
An improved stack bed wagon is provided for pickup of one or more mid-size or big bales in an agricultural field for transport that simultaneously tilts and...
US-D834,658 Metamorphosis plush toy
US-D834,657 Toy figurine
US-1,013,5677 Deployment of network-related features over cloud network
Briefly, methods and/or apparatuses of virtual deployment of network-related features are disclosed.
US-1,013,5465 Error correction methods and apparatuses using first and second decoders
Apparatuses and methods for error correcting data are provided. A first error correction code (ECC) decoder is configured to decode a first codeword to provide...
US-1,013,5250 Inertia compensated load tracking in electrical power systems
The present disclosure relates to systems and methods for balancing electrical generation and electrical demand in an electrical power system. In various...
US-1,013,4982 Array of cross point memory cells
An array of cross point memory cells comprises spaced first lines which cross spaced second lines. Two memory cells are individually between one of two...
US-1,013,4978 Magnetic cell structures, and methods of fabrication
A magnetic cell structure comprises a seed material including tantalum, platinum, and ruthenium. The seed material comprises a platinum portion overlying a...
US-1,013,4969 Vertical solid-state transducers and high voltage solid-state transducers having buried contacts and associated...
Solid-state transducers ("SSTs") and vertical high voltage SSTs having buried contacts are disclosed herein. An SST die in accordance with a particular...
US-1,013,4968 Solid state lighting devices with improved contacts and associated methods of manufacturing
Solid state lighting ("SSL") devices with improved contacts and associated methods of manufacturing are disclosed herein. In one embodiment, an SSL device...
US-1,013,4916 Transistor devices, memory cells, and arrays of memory cells
A transistor device includes a pair of source/drain regions having a channel region there-between. A first gate is proximate the channel region. A gate...
US-1,013,4810 Three dimensional memory array with select device
Three dimensional memory arrays and methods of forming the same are provided. An example three dimensional memory array can include a stack comprising a...
US-1,013,4809 Dual-layer dielectric in memory device
Embodiments of the present disclosure describe techniques and configurations for a memory device comprising a memory array having a plurality of wordlines...
US-1,013,4798 Pixel with strained silicon layer for improving carrier mobility and blue response in imagers
An imager having a pixel cell having an associated strained silicon layer. The strained silicon layer increases charge transfer efficiency, decreases image lag,...
US-1,013,4758 Memory devices and systems having reduced bit line to drain select gate shorting and associated methods
3D NAND memory devices and systems having reduced bit line to drain select gate shorting, including associated methods, are provided and described.
US-1,013,4742 Semiconductor device including a semiconductor substrate, a pillar, and a beam
The semiconductor storage device includes a lower electrode that are vertically extended from a semiconductor substrate, a beam including a first portion...
US-1,013,4741 Methods of forming an elevationally extending conductor laterally between a pair of conductive lines
A method of forming an elevationally extending conductor laterally between a pair of conductive lines comprises forming a pair of conductive lines spaced from...
US-1,013,4738 Low power memory device with JFET device structures
There is provided a low power memory device with JFET device structures. Specifically, a low power memory device is provided that includes a plurality memory...
US-1,013,4712 Methods and systems for improving power delivery and signaling in stacked semiconductor devices
Semiconductor die assemblies including stacked semiconductor dies having parallel plate capacitors formed between adjacent pairs of semiconductor dies in the...
US-1,013,4671 3D interconnect multi-die inductors with through-substrate via cores
A semiconductor device having a first die and a second die is provided. The first die of the device includes a first surface and a through-substrate via (TSV)...
US-1,013,4655 Semiconductor device packages with direct electrical connections and related methods
Semiconductor device packages in accordance with this disclosure may include a substrate and a stack of semiconductor dice attached to the substrate. An...
US-1,013,4647 Methods for forming interconnect assemblies with probed bond pads
An interconnect assembly includes a bond pad and an interconnect structure configured to electrically couple an electronic structure to the bond pad. The...
US-1,013,4597 Apparatuses including memory cells with gaps comprising low dielectric constant materials
Various embodiments include apparatuses and electronic devices. One such apparatus can include a first dielectric material and a second dielectric material, and...
US-1,013,4589 Polycrystalline ceramic substrate and method of manufacture
A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and...
US-1,013,4482 Apparatuses and methods for high speed writing test mode for memories
Apparatuses and methods are provided for a high speed writing test mode for memories. An example apparatus includes a memory core, a data terminal coupled to a...
US-1,013,4481 Pre-compensation of memory threshold voltage
Methods of operating a memory include storing a first target data state of multiple possible data states of a first memory cell to be programmed in a target...
US-1,013,4478 Apparatuses and methods for reducing read disturb
Apparatuses and methods for reducing read disturb are described herein. An example apparatus may include a first memory subblock including a first select gate...
US-1,013,4470 Apparatuses and methods including memory and operation of same
Disclosed herein is a memory cell. The memory cell may act both as a combined selector device and memory element. The memory cell may be programmed by applying...
US-1,013,4461 Apparatuses and methods for selective row refreshes
Apparatuses and methods for selective row refreshes are disclosed herein. An example apparatus may include a refresh control circuit. The refresh control...
US-1,013,4454 Apparatuses, circuits, and methods for biasing signal lines
Apparatuses, circuits, and methods are disclosed for biasing signal lines in a memory array. In one such example the memory array includes a signal line coupled...
US-1,013,4453 Invert operations using sensing circuitry
The present disclosure includes apparatuses and methods related to performing logical operations using sensing circuitry. An example apparatus comprises an...
US-1,013,3628 Apparatuses and methods for encoding using error protection codes
The present disclosure relates to apparatuses and method for encoding using error protection codes. An example apparatus comprises circuitry, for instance,...
US-1,013,2580 Forward assist assembly
A forward assist assembly movable between a standby position and an engaged position in a forward assist bore of a firearm. The assembly includes a button and...
US-1,013,2579 Firearm with locking lug bolt, and components thereof, for accurate field shooting
Components of a firearm having a bolt with locking lugs improve shooting accuracy, due to increased coaxial alignment between the bolt, the cartridge, the...
US-1,013,1088 Additive manufacturing method for discharging interlocking continuous reinforcement
An additive manufacturing method is disclosed. The method may include directing into a print head a reinforcement having a continuous axial core and integral...
US-1,012,9993 Sealed enclosure for protecting electronics
A system and an enclosure for protecting one or more electronic devices and having a rear base defining a cavity for holding the electronic device. The...
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