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Patent # Description
US-8,717,823 Multiple level program verify in a memory device
A series of programming pulses are applied to a memory cell to be programmed. A program verify pulse, at an initial program verify voltage, is applied to the...
US-8,717,819 NAND flash memory programming
A programming method and memory structure for preventing punch-through in a short channel source-side select gate structure includes adjusting voltages on the...
US-8,717,799 Variable resistance memory device with an interfacial adhesion heating layer, systems using the same and...
A variable resistance memory element and method of forming the same. The memory element includes a first electrode, a resistivity interfacial layer having a...
US-8,717,628 Flexible image processing apparatus and method
Some of the embodiments of the present disclosure provide an apparatus for processing a starting image, comprising: a first unit configured to provide starting...
US-8,717,220 Methods of quantizing signals using variable reference signals
Methods for reading a data location coupled to an electrical conductor. A counter receives a signal from an analog-to-digital converter coupled to the...
US-8,717,052 Testing fuse configurations in semiconductor devices
Methods, systems, and apparatus for testing semiconductor devices. A semiconductor device includes one or more external terminals configured to receive fuse...
US-8,716,897 Voltage generators having reduced or eliminated cross current
Embodiments described include voltage generators having reduced or eliminated cross current. Dynamic adjustment of a low or high threshold voltage used in a...
US-8,716,849 Semiconductor device including one or more stiffening elements
A stiffener molded to a semiconductor substrate, such as a lead frame, and methods of molding the stiffener to the substrate are provided. The stiffener is...
US-8,716,772 DRAM cell design with folded digitline sense amplifier
The present invention is generally directed to a DRAM cell design with folded digitline sense amplifier. In one illustrative embodiment, a memory array having a...
US-8,716,670 Methods and apparatus for integrated neutron/gamma detector
Methods and apparatus for a detector system to detect gamma and neutron radiation. In one embodiment, a detector comprises a tank to hold a liquid, a plurality...
US-8,716,119 Methods of forming transistor gates
Some embodiments include methods of forming charge storage transistor gates and standard FET gates in which common processing is utilized for fabrication of at...
US-8,716,116 Method of forming a DRAM array of devices with vertically integrated recessed access device and digitline
A method is disclosed for forming a memory device having buried access lines (e.g., wordlines) and buried data/sense lines (e.g., digitlines) disposed below...
US-8,716,084 Memory array with an air gap between memory cells and the formation thereof
A method of forming a memory array includes forming a dielectric over a semiconductor, forming a charge-storage structure over the dielectric, forming an...
US-8,716,075 Floating body field-effect transistors, and methods of forming floating body field-effect transistors
In one embodiment, a floating body field-effect transistor includes a pair of source/drain regions having a floating body channel region received therebetween....
US-8,716,060 Confined resistance variable memory cell structures and methods
Confined resistance variable memory cell structures and methods are described herein. One or more methods of forming a confined resistance variable memory cell...
US-8,716,056 Method for forming chalcogenide switch with crystallized thin film diode isolation
A three-dimensional memory array formed of one or more two-dimensional memory arrays of one-time programmable memory elements arranged in horizontal layers and...
US-8,716,038 Microelectronic workpiece processing systems and associated methods of color correction
Several embodiments of semiconductor systems and associated methods of color corrections are disclosed herein. In one embodiment, a method for producing a light...
US-8,716,011 Transcriptional control in Alicyclobacillus acidocaldarius and associated genes, proteins, and methods
Isolated and/or purified polypeptides and nucleic acid sequences encoding polypeptides from Alicyclobacillus acidocaldarius are provided. Further provided are...
US-8,715,893 Masks for use in lithography including image reversal assist features, lithography systems including such...
Microlithography masks are disclosed, such as those that include one or more image reversal assist features disposed between at least two primary mask features....
US-8,715,519 Plasma reactor with adjustable plasma electrodes and associated methods
Plasma reactors with adjustable plasma electrodes and associated methods of operation are disclosed herein. The plasma reactors can include a chamber, a...
US-8,715,488 Method and apparatus for making hybrid crude oils and fuels
A simplified process is provided for creating hybrid crude oils and hybrid crude fractions with characteristics superior to the original. The process uniquely...
US-8,714,423 Retention holster for a firearm having an offset mounted accessory
A holster for accommodating a handgun having an attached, offset accessory, including walls defining a cavity for receiving the handgun and the attached...
US-8,713,839 Firearm throat and rifling method
A firearm with a barrel that uses an ammunition discharge chamber that includes improved throat located between the chamber's free bore and the rifle bore. The...
US-8,713,385 Error scanning in flash memory
Various embodiments include methods, apparatus, and systems to scan at least a portion of a memory device for potential errors when a condition for scanning is...
US-8,713,374 Memory device and method for repairing a semiconductor memory
A block repair device is used in a Dynamic Random Access Memory (DRAM) having a primary array with a defective cell and a redundant array with a redundant row....
US-8,713,244 Sub-LUN input/output profiling for SSD devices
A read/write ratio for each of a plurality of data segments classified in a hot category as hot data segments is determined. Each of the plurality of hot data...
US-8,713,223 Methods and systems to accomplish variable width data input
Disclosed are methods and systems for variable width data input to a pattern-recognition processor. A variable width data input method may include receiving...
US-8,713,090 Enhancing user experiences using aggregated device usage data
Enhancing user experiences using aggregated device usage data includes receiving aggregated usage data for a device, such as a computing device and/or a...
US-8,712,249 Optical interconnect in high-speed memory systems
A optical link for achieving electrical isolation between a controller and a memory device is disclosed. The optical link increases the noise immunity of...
US-8,712,188 System and method for document orientation detection
In one embodiment, a method of detecting document orientation includes capturing a document image, binarizing each subimage of the document image to retain...
US-8,711,651 System and method for managing self-refresh in a multi-rank memory
Multi-rank memories and methods for self-refreshing multi-rank memories are disclosed. One such multi-rank memory includes a plurality of ranks of memory and...
US-8,711,617 Data modulation for groups of memory cells
Methods, devices, and systems for data modulation for groups of memory cells. Data modulation for groups of memory cells can include modulating N units of data...
US-8,711,605 Resistive memory element sensing using averaging
A system for determining the logic state of a resistive memory cell element, for example an MRAM resistive cell element. The system includes a controlled...
US-8,711,603 Permutational memory cells
Various embodiments comprise apparatuses having at least two resistance change memory (RCM) cells. In one embodiment, an apparatus includes at least two...
US-8,711,096 Dual protocol input device
A dual protocol input device for use with a host system is provided. In one embodiment, the input device comprises a chip with a number of semiconductor devices...
US-8,710,811 Voltage regulator with improved voltage regulator response and reduced voltage drop
A voltage regulator includes an output drive device configured to provide an output voltage to an output terminal; an error amplifier configured to control the...
US-8,710,583 Dual work function recessed access device and methods of forming
A recessed access device having a gate electrode formed of two or more gate materials having different work functions may reduce the gate-induced drain leakage...
US-8,710,320 Plants and seeds of corn variety CV294874
According to the invention, there is provided seed and plants of the corn variety designated CV294874. The invention thus relates to the plants, seeds and...
US-8,710,311 Potato cultivar F10
A potato cultivar designated F10 is disclosed. The invention relates to the tubers of potato cultivar F10, to the seeds of potato cultivar F10, to the plants of...
US-8,709,929 Methods of forming semiconductor devices having diffusion regions of reduced width
Semiconductor devices and methods for forming semiconductor devices are provided, including semiconductor devices that comprise one or more diffusion regions in...
US-8,709,927 Methods of implanting dopant ions
Methods of implanting dopant ions in a substrate include depositing a sacrificial material on a substrate. Dopant ions are implanted into the substrate while...
US-8,709,878 Methods of packaging imager devices and optics modules, and resulting assemblies
A method of packaging imager devices and optics modules is disclosed which includes positioning an imager device and an optics module in each of a plurality of...
US-8,709,866 Methods of forming integrated circuit packages
Some embodiments include methods of assembling integrated circuit packages in which at least two different conductive layers are formed over a bond pad region...
US-8,709,846 Solid state lighting devices and associated methods of manufacturing
Solid state lighting devices and associated methods of manufacturing are disclosed herein. In one embodiment, a solid state light device includes a light...
US-8,709,845 Solid state lighting devices with cellular arrays and associated methods of manufacturing
Solid state lighting ("SSL") devices with cellular arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting...
US-8,709,778 Method of adenoviral vector synthesis
This invention provides methods for adenoviral vector synthesis. The present invention further provides methods for binding adenovirus terminal protein obtained...
US-8,708,598 Stroke control trowel
An automatic speed control system for a power trowel for regulated adjustment of rotational speed of the trowel rotor assemblies. The disclosure provides for...
US-8,708,370 Safety enhancement for a safety belt
A safety enhancement for a safety belt comprises an actuator housing mechanically coupled to a first end plate, a rotor blade, an orifice plate, a second end...
US-8,708,315 Electric mining shovel hoist rope impact-reduction box
Disclosed is an impact-reduction box through which the hoisting ropes of a mining shovel or other machine pass. The impact-reduction box includes a roller frame...
US-8,707,855 Beverage Brewing Device
The beverage brewing device is configured for use with a beverage brewer having an inlet probe for dispensing water and an outlet probe. The beverage brewing...
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